74AUP1G09 Search Results

JESD22-A114E

Contextual Info: 74AUP1G09 Low-power 2-input AND gate with open-drain Rev. 2 — 9 July 2010 Product data sheet 1. General description The 74AUP1G09 provides the single 2-input AND gate with an open-drain output. The output of the device is an open-drain and can be connected to other open-drain outputs to

Contextual Info: 74AUP1G09 SINGLE 2 INPUT POSITIVE AND GATE WITH OPEN DRAIN OUTPUT Description Pin Assignments The Advanced Ultra Low Power AUP CMOS logic family is designed for low power and extended battery life in portable ( Top View ) applications. ( Top View ) 5 Vcc

Contextual Info: 74AUP1G09 SINGLE 2 INPUT POSITIVE AND GATE WITH OPEN DRAIN OUTPUT Description Pin Assignments The Advanced Ultra Low Power AUP CMOS logic family is designed for low power and extended battery life in portable applications. The AUP1G09 is a single AND gate with an open drain output

Contextual Info: 74AUP1G09 Low-power 2-input AND gate with open-drain Rev. 4 — 28 June 2012 Product data sheet 1. General description The 74AUP1G09 provides the single 2-input AND gate with an open-drain output. The output of the device is an open-drain and can be connected to other open-drain outputs to

Contextual Info: 74AUP1G09 Low-power 2-input AND gate with open-drain Rev. 3 — 28 November 2011 Product data sheet 1. General description The 74AUP1G09 provides the single 2-input AND gate with an open-drain output. The output of the device is an open-drain and can be connected to other open-drain outputs to

74AUP1G09SE

Contextual Info: 74AUP1G09 SINGLE 2 INPUT POSITIVE AND GATE WITH OPEN DRAIN OUTPUT Description Pin Assignments The Advanced Ultra Low Power AUP CMOS logic family is designed for low power and extended battery life in portable applications. The AUP1G09 is a single AND gate with an open drain output

74aup1g09gw

Abstract: JESD22-A114E
Contextual Info: 74AUP1G09 Low-power 2-input AND gate with open-drain Rev. 01 — 15 January 2009 Product data sheet 1. General description The 74AUP1G09 provides the single 2-input AND gate with an open-drain output. The output of the device is an open-drain and can be connected to other open-drain outputs to

Contextual Info: 74AUP1G09 Low-power 2-input AND gate with open-drain Rev. 4 — 28 June 2012 Product data sheet 1. General description The 74AUP1G09 provides the single 2-input AND gate with an open-drain output. The output of the device is an open-drain and can be connected to other open-drain outputs to

SOT-353

Contextual Info: NPA Number 022 September 2012 New Product Announcement Announcement LOGIC Advanced Ultra-Low Power Logic 74AUP1Gxx Description Advanced Ultra Low Power CMOS Single Gate Logic • 0.8 V to 3.6 V • 4 ma drive capability at 3.0 V  7 ns typical propagation time at 3V

AP3039AM

Abstract: 12SN7 AZ1117EH-3 AP3031K zabg6001 SMBJ11CA ztx689 DMN33D8L ap1901 AP3502
Contextual Info: Diodes Incorporated RoHS & REACH Compliance Re: End of Vehicle Life Directive EVL 2000/53/EC and Annex II (EVL II) 2000/53/EC Restrictions of Hazardous Substances Directive (RoHS) 2002/95/EC (repealed as from 3 January 2013 but listed here for completeness) & 2011/65/EU (RoHS II)

hef4051

Abstract: 74AUP2G34 74LVT1403 74ABT543A 74LV74 74AVCH1T45 74HC590 CBTD3306 NCX2200 74HC40103
Contextual Info: ロジック IC データスイッチ/アナログスイッチ コンパレータ レベルシフタ 汎用ロジック Index 2 ●● P3 NXP ロジック ●● P4 低抵抗アナログスイッチ/データスイッチ ●● P7 コンパレータ ●●