74AUP1G18GM Search Results

Contextual Info: 74AUP1G18 Low-power 1-of-2 demultiplexer with 3-state deselected output Rev. 4 — 24 November 2011 Product data sheet 1. General description The 74AUP1G18 provides a 1-of-2 non-inverting demultiplexer with 3-state output. The 74AUP1G18 buffers the data on input pin A and passes it either to output 1Y or 2Y,

Contextual Info: 74AUP1G18 Low-power 1-of-2 demultiplexer with 3-state deselected output Rev. 01 — 13 October 2006 Product data sheet 1. General description The 74AUP1G18 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families.

Contextual Info: 74AUP1G18 Low-power 1-of-2 demultiplexer with 3-state deselected output Rev. 5 — 3 July 2012 Product data sheet 1. General description The 74AUP1G18 provides a 1-of-2 non-inverting demultiplexer with 3-state output. The 74AUP1G18 buffers the data on input pin A and passes it either to output 1Y or 2Y,

74AUP1G18GF

Contextual Info: 74AUP1G18 Low-power 1-of-2 demultiplexer with 3-state deselected output Rev. 3 — 27 September 2010 Product data sheet 1. General description The 74AUP1G18 provides a 1-of-2 non-inverting demultiplexer with 3-state output. The 74AUP1G18 buffers the data on input pin A and passes it either to output 1Y or 2Y,

74AUP1G18GF

Abstract: JESD22-A114E
Contextual Info: 74AUP1G18 Low-power 1-of-2 demultiplexer with 3-state deselected output Rev. 02 — 3 April 2008 Product data sheet 1. General description The 74AUP1G18 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families.