74LCX74 Search Results

NLV17SZ74USG

Abstract: *74lcx74
Contextual Info: NL17SZ74 Single D Flip Flop The NL17SZ74 is a high performance, full function Edge triggered D Flip Flop, with all the features of a standard logic device such as the 74LCX74. Features • • • • • • • http://onsemi.com Extremely High Speed: tPD 2.6 ns typical at VCC = 5.0 V

LCX74

Abstract: 74LCX74 74LCX74M 74LCX74MX 74LCX74SJ 74LCX74SJX
Contextual Info: S e m i c o n d u c t o r LCX74 t* PRELIMINARY N a t i o n a l 74LCX74 Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flop with 5V Tolerant Inputs General Description Features The LCX74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and complementary Q, Q outputs.

SZ74

Abstract: NL17SZ74-D 74LCX74 A114 A115 C101 JESD22 NC7SZ74 NL17SZ74 NL17SZ74US
Contextual Info: NL17SZ74 Single D Flip Flop The NL17SZ74 is a high performance, full function Edge triggered D Flip Flop, with all the features of a standard logic device such as the 74LCX74. Features • • • • • • • http://onsemi.com Extremely High Speed: tPD 2.6 ns typical at VCC = 5.0 V

74LCX74

Abstract: 74LCX74BQX 74LCX74M 74LCX74MTC 74LCX74MTCX 74LCX74MX 74LCX74SJ LCX74 M14A M14D
Contextual Info: Revised February 2005 74LCX74 Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flop with 5V Tolerant Inputs General Description Features The LCX74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and complementary Q, Q outputs. Information at the input is transferred to the outputs on the

Contextual Info: S E M IC O N D U C T O R -n 74LCX74 Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flop with 5V Tolerant Inputs General Description Features The LCX74 is a dual D-type tlip-tlop w ith A synchronous C lear and S et inputs and com plem entary Q, Q outputs. In­

LCX74

Contextual Info: National Semiconductor 74LCX74 Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flop with 5V Tolerant Inputs General Description Features The LCX74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and complementary Q, Q outputs. Information at the input is transferred to the outputs on the

LCX74

Abstract: 74LCX74 74LCX74M 74LCX74MTC 74LCX74SJ M14A M14D MTC14
Contextual Info: Revised January 2001 74LCX74 Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flop with 5V Tolerant Inputs General Description Features The LCX74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and complementary Q, Q outputs. Information at the input is transferred to the outputs on the

74LCX74

Contextual Info: 74LCX74 LOW VOLTAGE CMOS DUAL D-TYPE FLIP FLOP WITH 5V TOLERANT INPUTS . 5VTOLERANT INPUTS • HIGHSPEED: fM A X = 1 50 MHz MAX. at Vcc = 3V ■ POWER-DOWN PROTECTION ON INPUTS AND OUTPUTS . SYMMETRICAL OUTPUT IMPEDANCE: M (Micro Package) |Io h | = Io l = 2 4 m A (MIN)

74LCX74

Contextual Info: 74LCX74 LOW VOLTAGE CMOS DUAL D-TYPE FLIP FLOP WITH 5V TOLERANT INPUTS PR ELIM IN ARY DATA . 5VTOLERANT INPUTS • HIGHSPEED: fM A X = 1 50 MHz MAX. at Vcc = 3V ■ POWER-DOWN PROTECTION ON INPUTS AND OUTPUTS . SYMMETRICAL OUTPUT IMPEDANCE: M (Micro Package)

Contextual Info: 74LCX74 Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flop with 5V Tolerant Inputs Features General Description • 5V tolerant inputs ■ Latch-up performance exceeds JEDEC 78 conditions The LCX74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and complementary Q, Q outputs.

Contextual Info: ^a rc h "f., jQ Q Q Revised April 1999 74LCX74 Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flop with 5V Tolerant Inputs General Description Features T h e LCX74 is a dual D -type flip-flop with Asynchronous C lear and Set inputs and com plem entary Q, Q outputs.

Contextual Info: Revised March 1999 S E M [CONDUCTOR TM 74LCX74 Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flop with 5V Tolerant Inputs General Description Features The LCX74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and complementary Q, Q outputs.

SO-14

Abstract: TSSOP-14 TSSOP14 SO14 SO-20
Contextual Info: LOGIC CIRCUITS LOW VOLTAGE HIGH SPEED CMOS - LCX 74LCX SERIES RECOMMENDED OPERATING CONDITIONS Symbol VCC VI TA Parameter Supply Voltage Input Voltage Operating Temperature 74 Series Type 74LCX00 74LCX02 74LCX04 74LCX08 74LCX14 74LCX32 74LCX74 74LCX125 74LCX240

CCD CP marking code

Contextual Info: NL17SZ74 Product Preview Single D Flip Flop The NL17SZ74 is a high performance, full function Edge triggered D Flip Flop, with all the features of a standard logic device such as the 74LCX74. • • • • • • • http://onsemi.com Extremely High Speed: tPD x.x ns typical at VCC = 5 V

Contextual Info: NL17SZ74 Single D Flip Flop The NL17SZ74 is a high performance, full function Edge triggered D Flip Flop, with all the features of a standard logic device such as the 74LCX74. Features • • • • • • • http://onsemi.com Extremely High Speed: tPD 2.6 ns typical at VCC = 5.0 V

Contextual Info: 74LCX74 Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flop with 5V Tolerant Inputs Features General Description • 5V tolerant inputs ■ Latch-up performance exceeds JEDEC 78 conditions The LCX74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and complementary Q, Q outputs.

NL17SZ74US

Abstract: 74LCX74 A114 A115 C101 JESD22 NC7SZ74 NL17SZ74
Contextual Info: NL17SZ74 Single D Flip Flop The NL17SZ74 is a high performance, full function Edge triggered D Flip Flop, with all the features of a standard logic device such as the 74LCX74. Features • • • • • • • http://onsemi.com Extremely High Speed: tPD 2.6 ns typical at VCC = 5.0 V

74LCX74

Abstract: 74LCX74BQX 74LCX74M 74LCX74MTC 74LCX74SJ LCX74 M14A M14D MTC14
Contextual Info: 74LCX74 Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flop with 5V Tolerant Inputs Features General Description • 5V tolerant inputs ■ Latch-up performance exceeds JEDEC 78 conditions The LCX74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and complementary Q, Q outputs.

74LCX74

Abstract: LCX74 74LCX74M 74LCX74T TSSOP14
Contextual Info: 74LCX74 LOW VOLTAGE CMOS DUAL D-TYPE FLIP FLOP WITH 5V TOLERANT INPUTS PRELIMINARY DATA • ■ ■ ■ ■ ■ ■ ■ ■ ■ 5V TOLERANT INPUTS HIGH SPEED: fMAX = 150 MHz MAX. at VCC = 3V POWER-DOWN PROTECTION ON INPUTS AND OUTPUTS SYMMETRICAL OUTPUT IMPEDANCE:

Contextual Info: Marchi 1995 Revised March 1999 S E M I C O N D U C T O R TM 74LCX74 Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flop with 5V Tolerant Inputs General Description Features T h e LCX74 is a dual D-type flip-flop with Asynchronous C lear and S e t inputs and com plem entary Q, Q outputs.

M14A

Abstract: M14D 74LCX74 74LCX74M 74LCX74MTC 74LCX74MTCX 74LCX74MX 74LCX74SJ 74LCX74SJX LCX74
Contextual Info: 74LCX74 Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flop with 5V Tolerant Inputs General Description Features The LCX74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and complementary Q Q outputs Information at the input is transferred to the outputs on the

NLV17SZ74USG

Contextual Info: NL17SZ74 Single D Flip Flop The NL17SZ74 is a high performance, full function Edge triggered D Flip Flop, with all the features of a standard logic device such as the 74LCX74. Features • • • • • • • http://onsemi.com Extremely High Speed: tPD 2.6 ns typical at VCC = 5.0 V

Contextual Info: NL17SZ74 Product Preview Single D Flip Flop The NL17SZ74 is a high performance, full function Edge triggered D Flip Flop, with all the features of a standard logic device such as the 74LCX74. • • • • • • • http://onsemi.com Extremely High Speed: tPD 2.6 ns typical at VCC = 5 V

Contextual Info: Revised August 2004 74LCX74 Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flop with 5V Tolerant Inputs General Description Features The LCX74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and complementary Q, Q outputs. Information at the input is transferred to the outputs on the