74LVC3G07DP Search Results
74LVC3G07DP Price and Stock
Nexperia 74LVC3G07DP,125IC BUF NON-INVERT 5.5V 8TSSOP |
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74LVC3G07DP,125 | Digi-Reel | 19,910 | 1 |
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74LVC3G07DP,125 | Reel | 8 Weeks | 6,000 |
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74LVC3G07DP,125 | 4,576 |
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74LVC3G07DP,125 | 13,746 | 1,575 |
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74LVC3G07DP,125 | Cut Strips | 2,500 | 8 Weeks | 1 |
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74LVC3G07DP,125 | Cut Tape | 1,539 | 1 |
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74LVC3G07DP,125 | 20,228 | 1 |
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74LVC3G07DP,125 | Reel | 6,000 |
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74LVC3G07DP,125 | 4,673 |
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74LVC3G07DP,125 | 6,000 | 8 Weeks | 6,000 |
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74LVC3G07DP,125 | 3,000 | 10 Weeks | 3,000 |
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74LVC3G07DP,125 | 10 Weeks | 3,000 |
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Nexperia 74LVC3G07DP-Q100HIC BUF NON-INVERT 5.5V 8TSSOP |
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74LVC3G07DP-Q100H | Reel | 3,000 |
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74LVC3G07DP-Q100H | Reel | 8 Weeks | 3,000 |
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74LVC3G07DP-Q100H |
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74LVC3G07DP-Q100H | Reel | 3,000 |
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74LVC3G07DP-Q100H | 10 Weeks | 3,000 |
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NXP Semiconductors 74LVC3G07DPTriple buffer with open-drain output Buffer, LVC/LCX/Z Series, 3-Func, 1-Input, CMOS, PDSO8 |
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74LVC3G07DP | 5,650 |
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74LVC3G07DP | 2,430 |
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74LVC3G07DP | 57,024 |
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Others 74LVC3G07DPINSTOCK |
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74LVC3G07DP | 2,547 |
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Nexperia 74LVC3G07DP12574LVC SERIES 5.5 V O-DRN 3 INPUT SURFACE MOUNT BUFFER - TSSOP-8 |
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74LVC3G07DP125 | 6,000 |
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74LVC3G07DP Datasheets (9)
Part |
ECAD Model |
Manufacturer |
Description |
Curated |
Datasheet Type |
PDF |
PDF Size |
Page count |
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74LVC3G07DP |
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Triple buffer with open-drain output | Original | 290.96KB | 21 | |||
74LVC3G07DP |
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OP Amp, Triple Buffer with Open-Drain Output, Tape and Reel | Original | 66.14KB | 13 | |||
74LVC3G07DP,125 |
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74LVC3G07 - IC LVC/LCX/Z SERIES, TRIPLE 1-INPUT NON-INVERT GATE, PDSO8, 3 MM, PLASTIC, SOT505-2, TSSOP-8, Gate | Original | 290.99KB | 21 | |||
74LVC3G07DP,125 |
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Triple buffer with open-drain output - Description: Triple Buffer With Open-Drain Outputs ; Logic switching levels: TTL ; Number of pins: 8 ; Output drive capability: 32 mA ; Power dissipation considerations: Low Power or Battery Applications ; Propagation delay: 2.1@3.3V ns; Voltage: 1.65 - 5.5; Package: SOT505-2 (TSSOP8); Container: Reel Pack, Reverse, Reverse | Original | 86.95KB | 16 | |||
74LVC3G07DP-G |
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74LVC3G07DP - Triple buffer with open-drain output - Description: Triple Buffer With Open-Drain Outputs ; Logic switching levels: TTL ; Number of pins: 8 ; Output drive capability: 32 mA ; Power dissipation considerations: Low Power or Battery Applications ; Propagation delay: 2.1@3.3V ns; Voltage: 1.65 - 5.5 | Original | 290.99KB | 21 | |||
74LVC3G07DP-G |
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Triple buffer with open-drain output - Description: Triple Buffer With Open-Drain Outputs ; Logic switching levels: TTL ; Number of pins: 8 ; Output drive capability: 32 mA ; Power dissipation considerations: Low Power or Battery Applications ; Propagation delay: 2.1@3.3V ns; Voltage: 1.65 - 5.5 | Original | 86.95KB | 16 | |||
74LVC3G07DP-Q100125 |
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BUFFER, LVC/LCX/Z SERIES | Original | 798.48KB | ||||
74LVC3G07DP-Q100H |
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74LVC3G07DP-Q100 - 74LVC3G07DP-Q100 - Triple buffer with open-drain output | Original | 111.57KB | 14 | |||
74LVC3G07DP/S400,1 |
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74LVC3G07DP/S400 - Triple buffer with open-drain output, SOT505-2 Package, Standard Marking, Reel Pack, Reverse | Original | 290.99KB | 21 |
74LVC3G07DP Datasheets Context Search
Catalog Datasheet |
Type |
Document Tags |
PDF |
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74LVC3G07
Abstract: 74LVC3G07DC 74LVC3G07DP 74LVC3G07GM 74LVC3G07GT
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Original |
74LVC3G07 74LVC3G07 74LVC3G07DC 74LVC3G07DP 74LVC3G07GM 74LVC3G07GT | |
Contextual Info: 74LVC3G07 Triple buffer with open-drain output Rev. 11 — 9 April 2013 Product data sheet 1. General description The 74LVC3G07 provides three non-inverting buffers. The output of the device is an open-drain and can be connected to other open-drain outputs to implement active-LOW wired-OR or active-HIGH wired-AND functions. |
Original |
74LVC3G07 74LVC3G07 | |
Contextual Info: 74LVC3G07 Triple buffer with open-drain output Rev. 8 — 19 October 2011 Product data sheet 1. General description The 74LVC3G07 provides three non-inverting buffers. The output of the device is an open-drain and can be connected to other open-drain outputs to implement active-LOW wired-OR or active-HIGH wired-AND functions. |
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74LVC3G07 74LVC3G07 | |
Contextual Info: 74LVC3G07 Triple buffer with open-drain output Rev. 02 — 27 October 2004 Product data sheet 1. General description The 74LVC3G07 is a high-performance, low-power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compatible TTL families. |
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74LVC3G07 74LVC3G07 | |
74LVC3G07
Abstract: 74LVC3G07DC 74LVC3G07DP 74LVC3G07GM 74LVC3G07GT JESD22-A114E MO-187
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Original |
74LVC3G07 74LVC3G07 74LVC3G07DC 74LVC3G07DP 74LVC3G07GM 74LVC3G07GT JESD22-A114E MO-187 | |
Contextual Info: 74LVC3G07 Triple buffer with open-drain output Rev. 10 — 27 June 2012 Product data sheet 1. General description The 74LVC3G07 provides three non-inverting buffers. The output of the device is an open-drain and can be connected to other open-drain outputs to implement active-LOW wired-OR or active-HIGH wired-AND functions. |
Original |
74LVC3G07 74LVC3G07 | |
Contextual Info: 74LVC3G07 Triple buffer with open-drain output Rev. 05 — 19 February 2008 Product data sheet 1. General description The 74LVC3G07 provides three non-inverting buffers. The output of the device is an open-drain and can be connected to other open-drain outputs to implement active-LOW wired-OR or active-HIGH wired-AND functions. |
Original |
74LVC3G07 74LVC3G07 | |
74LVC3G07
Abstract: 74LVC3G07DC 74LVC3G07DP 74LVC3G07GT MO-187
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Original |
74LVC3G07 74LVC3G07 74LVC3G07DC 74LVC3G07DP 74LVC3G07GT MO-187 | |
74LVC3G07
Abstract: 74LVC3G07DC 74LVC3G07DP MO-187 mna591
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Original |
74LVC3G07 74LVC3G07 74LVC3G07DC 74LVC3G07DP MO-187 mna591 | |
Contextual Info: 74LVC3G07 Triple buffer with open-drain output Rev. 9 — 23 November 2011 Product data sheet 1. General description The 74LVC3G07 provides three non-inverting buffers. The output of the device is an open-drain and can be connected to other open-drain outputs to implement active-LOW wired-OR or active-HIGH wired-AND functions. |
Original |
74LVC3G07 74LVC3G07 | |
SOT902-1Contextual Info: 74LVC3G07 Triple buffer with open-drain output Rev. 04 — 21 May 2007 Product data sheet 1. General description The 74LVC3G07 provides three non-inverting buffers. The output of the device is an open drain and can be connected to other open-drain outputs to implement active-LOW wired-OR or active-HIGH wired-AND functions. |
Original |
74LVC3G07 74LVC3G07 SOT902-1 | |
74LVC3G07
Abstract: 74LVC3G07DC 74LVC3G07DP NL37WZ07 SN74AUP3G07 SN74LVC3G07 SLG74LB3G07
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Original |
SLG74LB3G07 000-0074LB3G07-11 74LVC3G07 74LVC3G07DC 74LVC3G07DP NL37WZ07 SN74AUP3G07 SN74LVC3G07 SLG74LB3G07 | |
74LVC3G07DP-Q100Contextual Info: 74LVC3G07-Q100 Triple buffer with open-drain output Rev. 1 — 29 January 2013 Product data sheet 1. General description The 74LVC3G07-Q100 provides three non-inverting buffers. The output of the device is an open-drain and can be connected to other open-drain |
Original |
74LVC3G07-Q100 74LVC3G07-Q100 74LVC3G07 74LVC3G07DP-Q100 |