74LVCH821A Search Results
74LVCH821A Datasheets (3)
Part | ECAD Model | Manufacturer | Description | Datasheet Type | PDF Size | Page count | |
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74LVCH821AD |
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10-bit D-type flip-flop with 5-volt tolerant inputs/outputs, positive-edge trigger, 3-state | Scan | 172.51KB | 4 | ||
74LVCH821ADB |
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10-bit D-type flip-flop with 5-volt tolerant inputs/outputs, positive-edge trigger, 3-state | Scan | 172.51KB | 4 | ||
74LVCH821APW |
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10-bit D-type flip-flop with 5-volt tolerant inputs/outputs, positive-edge trigger, 3-state | Scan | 172.51KB | 4 |
74LVCH821A Datasheets Context Search
Catalog Datasheet | Type | Document Tags | |
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ADB 24
Abstract: 74LVC821A LVCH821A SSOP24 TSSOP24
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OCR Scan |
10-bit 74LVC821A 74LVCH821A LVCH821A 74LVC 711DflEb 010071L) ADB 24 SSOP24 TSSOP24 | |
Contextual Info: Philips Semiconductors Objective Specification 10-bit D-type flip-flop with 5-volt tolerant 74LVC821A inputs/outputs; positive-edge trigger; 3-state_ 74LVCH821A FEATURES • • • • • • • • • • 5-volt tolerant inputs/outputs, for interfacing with 5-volt logic. |
OCR Scan |
10-bit 74LVC821A 74LVCH821A LVCH821A ma821A | |
Contextual Info: Philips Semiconductors Objective Specification 10-bit D-type flip-flop with 5-volt tolerant Jnjjuts/outgutsjjjositive^ FEATURES • • • • • • SYMBOL W l^ p l h PARAMETER CONDITIONS TYPICAL UNIT propagation delay CP to Q„ CL = 50 pF Vcc = 3-3 V |
OCR Scan |
10-bit LVCH821A VC821A 74LVCH821A |