74LVX86 Search Results

74LVX86

Abstract: 74LVX86M 74LVX86MTR 74LVX86TTR TSSOP14
Contextual Info: 74LVX86 LOW VOLTAGE CMOS QUAD EXCLUSIVE OR GATE WITH 5V TOLERANT INPUTS • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED : tPD = 5.8 ns TYP. at VCC = 3.3V 5V TOLERANT INPUTS INPUT VOLTAGE LEVEL : VIL=0.8V, VIH=2V at VCC=3V LOW POWER DISSIPATION: ICC = 2 µA (MAX.) at TA=25°C

M14D

Abstract: 74LVX86 74LVX86M 74LVX86MTC 74LVX86MTCX 74LVX86MX 74LVX86SJ 74LVX86SJX M14A
Contextual Info: 74LVX86 Low Voltage Quad 2-Input Exclusive-OR Gate General Description Features The LVX86 contains four 2-input exclusive-OR gates The inputs tolerate voltages up to 7V allowing the interface of 5V systems to 3V systems Y Y Y Y Logic Symbol Input voltage level translation from 5V to 3V

74LVX86

Contextual Info: 74LVX86 LOW VOLTAGE CMOS QUAD EXCLUSIVE OR GATE . HIGH SPEED: tPD = 5.8 ns TYP. at Vcc = 3.3V • INPUT VOLTAGE LEVEL: V il = 0.8V, V ih = 2V at Vcc = 3V ■ LOW POWER DISSIPATION: Icc = 2 |oA (MAX.) at T a = 25 °C . LOW NOISE: V olp = 0.3 V (TYP.) at Vcc = 3.3V

Contextual Info: S E M IC O N D U C T O R 74LVX86 Low Voltage Quad 2-Input Exclusive-OR Gate General Description Features The LVX86 contains lour 2-input exclusive-OR gates. The in­ puts tolerate voltages up to 7V allowing the interface ot 5V systems to 3V systems. • Input voltage level translation trom 5V to 3V

74LVX86

Abstract: 74LVX86M 74LVX86MTC 74LVX86SJ M14A M14D MTC14
Contextual Info: S E M IC O N D U C T O R tm 74LVX86 Low Voltage Quad 2-Input Exclusive-OR Gate General Description Features The LVX86 contains fo u r 2-input exclusive-O R gates. The inputs tolerate voltages up to 7V allowing the interface of 5V system s to 3V system s. • Input voltage level translation from 5V to 3V

74LVX86

Abstract: 74LVX86M 74LVX86MTC 74LVX86MTCX 74LVX86SJ M14A M14D MTC14
Contextual Info: Revised February 2005 74LVX86 Low Voltage Quad 2-Input Exclusive-OR Gate General Description Features The LVX86 contains four 2-input exclusive-OR gates. The inputs tolerate voltages up to 7V allowing the interface of 5V systems to 3V systems. • Input voltage level translation from 5V to 3V

d6090

Contextual Info: tiS G llS E 007^4^3 TOE • NSC1 j « ,« « 74LVX86 Low Voltage Quad 2-Input Exclusive-OR Gate General Description Features The 'LVX 8 6 co ntains fo u r 2-input exclusive-O R gates. The inputs to lera te vo ltages up to 7V allow ing the interface o f 5V

74LVX86

Contextual Info: LVX86 National ÆM Semiconductor 74LVX86 Low Voltage Quad 2-Input Exclusive-OR Gate General Description Features The LVX86 contains four 2-input exclusive-OR gates. The inputs tolerate voltages up to 7V allowing the interface of 5V systems to 3V systems. • Input voltage level translation from 5V to 3V

74LVX86

Abstract: 74LVX86M 74LVX86MTC 74LVX86SJ M14A M14D MTC14
Contextual Info: 74LVX86 Low Voltage Quad 2-Input Exclusive-OR Gate General Description Features The LVX86 contains four 2-input exclusive-OR gates. The inputs tolerate voltages up to 7V allowing the interface of 5V systems to 3V systems. n Input voltage level translation from 5V to 3V

74LVX86

Abstract: 74LVX86M 74LVX86MTC 74LVX86SJ M14A M14D MTC14
Contextual Info: 74LVX86 Low Voltage Quad 2-Input Exclusive-OR Gate Features General Description • Input voltage level translation from 5V to 3V The LVX86 contains four 2-input exclusive-OR gates. The inputs tolerate voltages up to 7V allowing the interface of 5V systems to 3V systems.

74LVX86

Contextual Info: 74LVX86 LOW VOLTAGE CMOS QUAD EXCLUSIVE OR GATE . HIGH SPEED: tPD = 5.8 ns TYP. at Vcc = 3.3V • INPUT VOLTAGE LEVEL: V il = 0.8V, V ih = 2V at Vcc = 3V ■ LOW POWER DISSIPATION: Icc = 2 |oA (MAX.) at T a = 25 °C . LOW NOISE: V olp = 0.3 V (TYP.) at Vcc = 3.3V

74LVX86

Abstract: 74LVX86M 74LVX86MTC 74LVX86SJ M14A M14D MTC14
Contextual Info: Revised June 2003 74LVX86 Low Voltage Quad 2-Input Exclusive-OR Gate General Description Features The LVX86 contains four 2-input exclusive-OR gates. The inputs tolerate voltages up to 7V allowing the interface of 5V systems to 3V systems. • Input voltage level translation from 5V to 3V

74LVX86

Abstract: 74LVX86M 74LVX86MTC 74LVX86SJ M14A M14D MTC14
Contextual Info: Revised March 1999 74LVX86 Low Voltage Quad 2-Input Exclusive-OR Gate General Description Features The LVX86 contains four 2-input exclusive-OR gates. The inputs tolerate voltages up to 7V allowing the interface of 5V systems to 3V systems. • Input voltage level translation from 5V to 3V

Contextual Info: S E M [CONDUCTOR TM 74LVX86 Low Voltage Quad 2-Input Exclusive-OR Gate General Description Features The LVX86 contains four 2-input exclusive-OR gates. The inputs tolerate voltages up to 7V allowing the interface of 5V systems to 3V systems. • Input voltage level translation from 5V to 3V

Contextual Info: 74LVX86 Low Voltage Quad 2-Input Exclusive-OR Gate Features General Description • Input voltage level translation from 5V to 3V The LVX86 contains four 2-input exclusive-OR gates. The inputs tolerate voltages up to 7V allowing the interface of 5V systems to 3V systems.

74LVX86

Abstract: 74LVX86M 74LVX86MTCX 74LVX86MX 74LVX86SJ 74LVX86SJX M14A
Contextual Info: LVX86 ß National Semiconductor 74LVX86 Low Voltage Quad 2-Input Exclusive-OR Gate General Description Features The LVX8 6 contains four 2-input exclusive-OR gates. The inputs tolerate voltages up to 7V allowing the interface of 5V systems to 3V systems.

74LVX86

Abstract: 74LVX86M 74LVX86T TSSOP14
Contextual Info: 74LVX86  LOW VOLTAGE CMOS QUAD EXCLUSIVE OR GATE • ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD = 5.8 ns TYP. at VCC = 3.3V INPUT VOLTAGE LEVEL: VIL = 0.8V, VIH = 2V at VCC = 3V LOW POWER DISSIPATION: ICC = 2 µA (MAX.) at TA = 25 oC LOW NOISE: VOLP = 0.3 V (TYP.) at VCC = 3.3V

74LVX86

Abstract: 74LVX86MTR 74LVX86TTR TSSOP14
Contextual Info: 74LVX86 LOW VOLTAGE CMOS QUAD EXCLUSIVE OR GATE WITH 5V TOLERANT INPUTS • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD = 5.8 ns TYP. at VCC = 3.3V 5V TOLERANT INPUTS INPUT VOLTAGE LEVEL: VIL=0.8V, VIH=2V at VCC=3V LOW POWER DISSIPATION: ICC = 2 µA (MAX.) at TA=25°C

74LVX86

Abstract: 74LVX86M 74LVX86T TSSOP14
Contextual Info: 74LVX86  LOW VOLTAGE CMOS QUAD EXCLUSIVE OR GATE • ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD = 5.8 ns TYP. at VCC = 3.3V INPUT VOLTAGE LEVEL: VIL = 0.8V, VIH = 2V at VCC = 3V LOW POWER DISSIPATION: ICC = 2 µA (MAX.) at TA = 25 oC LOW NOISE: VOLP = 0.3 V (TYP.) at VCC = 3.3V

TTL 74-series IC LIST

Abstract: 74 Series Logic ICs TTL 74-series IC PO74G74 PO74G04 list cmos ics 49fct32805 49FCT3807 Potato Semiconductor 49FCT3805
Contextual Info: 04/18/07 Pin to Pin & Package to Package Compatible IC List Standard 1.65V -3.6 V TTL / CMOS Clock Buffer PotatoSemi PO49FCT3802A 1GHz 1 to 5 PO49FCT3803B 700MHz 1 to 7 PO49FCT3804 800MHz 2X1 to 4 PO49FCT3805B 800MHz 2X1 to 5 PO49FCT3806 750MHz 2X1 to 5 PO49FCT3807B

5555 FAIRCHILD optocoupler

Abstract: MC74HC374N 74hc14n equivalent NC7S125M5 14069 HCF4541BEY APPLICATION HCF4013BE 4026 fairchild datasheet 14543 motorola Motorola DM74LS139N
Contextual Info: R E L I A B L E . L O G I C . I N N O V A T I O N . Logic Cross-Reference Logic Cross-Reference 2003 Texas Instruments Printed in the U.S.A. by Texoma Business Forms, Durant, Oklahoma Printed on recycled paper. SCYB017A NEW First Revision Logic Cross-Reference

"XOR Gate"

Abstract: 2-input-XOR 74LVX86 MC74LVX86 MC74LVX86DR2 MC74LVX86DR2G MC74LVX86DTR2 MC74LVX86M MC74LVX86MG
Contextual Info: 74LVX86 Quad 2−Input XOR Gate With 5 V−Tolerant Inputs The 74LVX86 is an advanced high speed CMOS 2−input Exclusive−OR gate. The inputs tolerate voltages up to 7.0 V, allowing the interface of 5.0 V systems to 3.0 V systems. http://onsemi.com Features

74LVT JK Flip Flop

Abstract: led driver SOT23 6pin lcx244 MOTOROLA lcx 4245 LCX244 quad single supply 50 Ohm Line Drivers diode sj Fairchild Power Switch package to 220 p5 MAX 16841 On semiconductor LCX 574 PA
Contextual Info: 1 Chapter 1 Introduction to Low-Voltage Logic Chapter C R O S S V O L T Parts & Availability 17 Packaging Options 37 Low-Voltage Logic Cross Reference 49 Glossary 57 Fairchild Low-Voltage Logic Reference Guide Chapter Chapter Glossary  Introduction to Low-Voltage Logic

Contextual Info: Revised March 1999 SEMICONDUCTOR TM General Description Features T h e LVX86 contains fo u r 2-input exclusive-O R gates. The inputs tolerate voltages up to 7V allowing th e interface of 5V system s to 3V system s. • Input voltage level translation from 5V to 3V