74ACT1284 Search Results

IEEE1284

Abstract: 74ACT1284 AN1524 SN74ACT1284 ST1284
Contextual Info: AN1524 APPLICATION NOTE 74ACT1284 STANDARD LOGIC: A HIGH SPEED IEEE 1284 TRANCEIVER M. Porto 1. INTRODUCTION. The communication standard IEEE 1284 was created to supply the need for an existing defined standard for bi-directional parallel communication between the PC and printing peripherals. Being backward

Contextual Info: Revised November 2000 74ACT1284 IEEE 1284 Transceiver General Description Features The 74ACT1284 contains four non-inverting bidirectional buffers and three non-inverting buffers with open Drain outputs and high drive capability on the B Ports. It is intended

Contextual Info: 74ACT1284 HIGH SPEED IEEE1284 TRANSCEIVER • ■ ■ ■ ■ ■ ■ HIGH SPEED: TPD = 6.5 ns Max. 85°C at VCC = 4.5V LOW POWER DISSIPATION: ICC = 80 µA (MAX.) at VCC = 5.5V T = 85 °C TTL COMPATIBLE INPUTS VIH = 2V (Min.) VIL = 0.8V (Max.) OPERATING VOLTAGE RANGE:

SN 0203

Abstract: 74ACT1284 74ACT1284MSA 74ACT1284MTC 74ACT1284SC ACT1284 MS-013 MSA20 MTC20 P1284
Contextual Info: D Une1!9 N h icoo R e v is e d N o v e m b e r 199 9 TM 74ACT1284 IEEE 1284 Transceiver General Description Features T h e 7 4 A C T 1 2 8 4 c o n ta in s fo u r n o n -in v e rtin g b id ire c tio n a l • T T L -c o m p a tib le in p u ts b u ffe rs a n d th re e n o n -in v e rtin g b u ffe rs w ith o p e n D ra in o u t­

Contextual Info: s e m ic o n d u c t o r Revised November 1999 74ACT1284 IEEE 1284 Transceiver General Description Features The 74ACT1284 contains four non-inverting bidirectional buffers and three non-inverting buffers with open Drain out­ puts and high drive capability on the B Ports. It is intended

HD 1143

Contextual Info: 74ACT1284 HIGH SPEED IEEE1284 TRANSCEIVER • ■ HIGH SPEED: TPD = 6.5 ns Max. 85°C at VCC = 4.5V LOW POWER DISSIPATION: ICC = 80 µA (MAX.) at VCC = 5.5V T = 85 °C TTL COMPATIBLE INPUTS VIH = 2V (Min.) VIL = 0.8V (Max.) OPERATING VOLTAGE RANGE: VCC (OPR.) = 4.5V to 5.5V

IEEE 1284 Peripheral Interface Controller

Abstract: IEEE1284 AN-994 74ACT1284 AN994
Contextual Info: Fairchild Semiconductor Application Note May 1995 Revised December 2000 Simplified Intelligent Port Design Using the 74ACT1284 Introduction 74ACT1284 Until recently a standard for parallel port data transfer has been missing in the industry. IEEE1284, approved by the

74ACT1284MSA

Abstract: 74ACT1284MTC 74ACT1284SC MS-013 MSA20 MTC20 P1284 74ACT1284
Contextual Info: Revised November 1999 74ACT1284 IEEE 1284 Transceiver General Description Features The 74ACT1284 contains four non-inverting bidirectional buffers and three non-inverting buffers with open Drain outputs and high drive capability on the B Ports. It is intended

ieee 1284

Abstract: "IEEE 1284" transceiver 74VHC161284 VME320 74ACT1284 74LVX161284 IEEE-1284 74LVXZ161284 GTLP16612
Contextual Info: Interface Products by Function Transceiver Products 74ACT1284 Interface Technology IEEE 1284 Product Description IEEE1284 Transceiver Package Voltage Node SOIC-Wide SSOP TSSOP 5 74LVX161284 IEEE 1284 Low Voltage IEEE 161284 Translating Transceiver SSOP TSSOP

pd 1 1284

Abstract: 74ACT1284 AN1524 IEEE1284 SN74ACT1284 ST1284 74ACT1284 application
Contextual Info: AN1524 APPLICATION NOTE 74ACT1284 STANDARD LOGIC: A HIGH SPEED IEEE 1284 TRANCEIVER M. Porto 1. INTRODUCTION. The communication standard IEEE 1284 was created to supply the need for an existing defined standard for bi-directional parallel communication between the PC and printing peripherals. Being backward

74ACT1284

Abstract: 74ACT1284MTR 74ACT1284TTR IEEE1284
Contextual Info: 74ACT1284 HIGH SPEED IEEE1284 TRANSCEIVER • ■ ■ ■ ■ ■ ■ HIGH SPEED: TPD = 6.5 ns Max. 85°C at VCC = 4.5V LOW POWER DISSIPATION: ICC = 80 µA (MAX.) at VCC = 5.5V T = 85 °C TTL COMPATIBLE INPUTS VIH = 2V (Min.) VIL = 0.8V (Max.) OPERATING VOLTAGE RANGE:

74ACT1284

Abstract: 74ACT1284MSA 74ACT1284MTC 74ACT1284SC MS-013 MSA20 MTC20 P1284
Contextual Info: s e m ic o n d u c t o r Revised July 1999 74ACT1284 IEEE 1284 Transceiver General Description Features T he 74A C T1284 contains fo u r non-inverting bidirectional buffers and three non-inverting buffers w ith open Drain o ut­ puts and high drive capability on the B Ports. It is intended

74ACT1284MTR

Abstract: 74ACT1284TTR IEEE1284 74ACT1284 A7 s 62
Contextual Info: 74ACT1284 HIGH SPEED IEEE1284 TRANSCEIVER • ■ ■ ■ ■ ■ ■ HIGH SPEED: TPD = 6.5 ns Max. 85°C at VCC = 4.5V LOW POWER DISSIPATION: ICC = 80 µA (MAX.) at VCC = 5.5V T = 85 °C TTL COMPATIBLE INPUTS VIH = 2V (Min.) VIL = 0.8V (Max.) OPERATING VOLTAGE RANGE:

74ALVCH245

Abstract: 74LCX16500 74ABT245 74AC245 74ACQ245 74ACT1284 74ACT245 74ACTQ245 74ALVC245 74F243
Contextual Info: Logic Products by Function Transceiver Products Logic Product Family Product Description 74ACT1284 FACT ACT IEEE1284 Transceiver 74F243 FAST DM74LS243 Package Voltage Node SOIC-Wide SSOP TSSOP 5 Quad Bus Transceiver with 3-STATE Outputs SOIC 5 Bipolar-LS

ATTP1

Abstract: 02DN 74ACT1284 ACT1284 P1284 BAOUS b5b7
Contextual Info: . . . „ . r February 1995 S e m ico n d u c to r 74ACT1284 IEEE 1284 Transceiver General Description Features The 'ACT1284 contains four non-inverting bidirectional buffers and three non-inverting buffers with open Drain outputs and high drive capability on the B ports. It is intended to

Contextual Info: June 1996 Semiconductor 74ACT1284 IEEE 1284 Transceiver General Description Features The ’ACT1284 contains four non-inverting bidirectional buff­ ers and three non-inverting buffers with open Drain outputs and high drive capability on the B ports. It is intended to

Contextual Info: Logic Products by Function Receiver Products Logic Product Family Product Description Package Voltage Node 74ACT1284 FACT ACT IEEE1284 Transceiver SOIC-Wide SSOP TSSOP 5 100314 ECL Low Power Quint Differential Line Receiver DIP PLCC SOIC-Wide Other 74LVX161284

SSTV16857

Abstract: 74ACT1284 74ALVC162835 74ALVC162838 74ALVC162839 74ALVC16722 74ALVC16835 74ALVC16838 74ALVC16839 74ALVCF162835
Contextual Info: Interface Products by Function Driver Products Interface Technology Product Description 74ACT1284 IEEE 1284 IEEE1284 Transceiver 74ALVC162835 DIMM Drivers 74ALVC162838 Package Voltage Node SOIC-Wide SSOP TSSOP 5 Low Voltage 18-Bit Universal Bus Driver with 3.6V Tolerant Inputs/Outputs and 26 Ohm Series

IEEE-1284

Abstract: "IEEE 1284" IEEE 1284 RECEIVER 74LVX161284A 74LVXZ161284 74VHC161284 IEEE1284 74ACT1284 74LVX161284
Contextual Info: Interface Products by Technology IEEE 1284 Products Interface Function Product Description 74ACT1284 Transceiver, Driver, Receiver IEEE1284 Transceiver 74LVX161284 Transceiver, Driver, Receiver Package Voltage Node SOIC-Wide SSOP TSSOP 5 Low Voltage IEEE 161284 Translating Transceiver

diode B7

Abstract: B7 DIODE 74ACT1284 74ACT1284MSA 74ACT1284MTC 74ACT1284SC MS-013 MSA20 MTC20 P1284
Contextual Info: Revised November 2000 74ACT1284 IEEE 1284 Transceiver General Description Features The 74ACT1284 contains four non-inverting bidirectional buffers and three non-inverting buffers with open Drain outputs and high drive capability on the B Ports. It is intended

lvx161284

Abstract: vhc161284 IEEE 1284 Peripheral Interface Controller sidewinder IEEE 1284 IEEE-1284 386SL 74ACT1284 74LVX161284 74VHC161284
Contextual Info: Fairchild Semiconductor Application Note July 1999 Revised November 2000 IEEE 1284 Interface Design Solutions Applications note supporting the 74ACT1284, 74VHC161284 and 74LVX161284 devices Introduction The IEEE 1284 standard for high speed bi-directional

Contextual Info: Revised July 1999 74ACT1284 IEEE 1284 Transceiver General Description Features The 74ACT1284 contains four non-inverting bidirectional buffers and three non-inverting buffers with open Drain outputs and high drive capability on the B Ports. It is intended

diodes B2V datasheet

Abstract: 74ACT1284 ACT1284 C1996 MSA20 P1284
Contextual Info: 74ACT1284 IEEE 1284 Transceiver General Description Features The ’ACT1284 contains four non-inverting bidirectional buffers and three non-inverting buffers with open Drain outputs and high drive capability on the B ports It is intended to provide a standard signaling method for a bi-direction parallel peripheral in an Extended Capabilities Port mode ECP

IEEE 1284

Abstract: act1284
Contextual Info: ACT1284 P A IR Ç H IL D S E M IC O N D U C T O R TM 74ACT1284 IEEE 1284 Transceiver General Description Features The 7 4A C T1284 co nta in s four non-inverting bidirectional buffers and three non-inverting buffers w ith open D rain o ut­ puts and high drive capability on the B Ports. It is intended