74AUP1G126 Search Results

74AUP1G126

Abstract: 74AUP1G126GF 74AUP1G126GM 74AUP1G126GW JESD22-A114-C MO-203
Contextual Info: 74AUP1G126 Low-power buffer/line driver; 3-state Rev. 02 — 28 June 2006 Product data sheet 1. General description The 74AUP1G126 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. Schmitt-trigger action at all

Contextual Info: 74AUP1G126 SINGLE BUFFER GATE WITH 3-STATE OUTPUT Description Pin Assignments The Advanced Ultra Low Power AUP CMOS logic family is designed (Top View) for low power and extended battery life in portable applications. The 74AUP1G126 is a single non-inverting buffer/bus driver designed

74AUP1G126

Abstract: 74AUP1G126GF 74AUP1G126GM 74AUP1G126GW
Contextual Info: 74AUP1G126 Low-power buffer/line driver; 3-state Rev. 3 — 3 September 2010 Product data sheet 1. General description The 74AUP1G126 provides a single non-inverting buffer/line driver with 3-state output. The 3-state output is controlled by the output enable input OE . A LOW level at pin OE

Contextual Info: 74AUP1G126 Low-power buffer/line driver; 3-state Rev. 4 — 24 November 2011 Product data sheet 1. General description The 74AUP1G126 provides a single non-inverting buffer/line driver with 3-state output. The 3-state output is controlled by the output enable input OE . A LOW level at pin OE

Contextual Info: 74AUP1G126 SINGLE BUFFER GATE WITH 3-STATE OUTPUT Description Pin Assignments The Advanced Ultra Low Power AUP CMOS logic family is designed for low power and extended battery life in portable applications. ( Top View ) ( Top View ) The 74AUP1G126 is a single non-inverting buffer/bus driver designed

74AUP1G126

Abstract: 74AUP1G126GM 74AUP1G126GW JESD22-A114-C MO-203
Contextual Info: 74AUP1G126 Low-power buffer/line driver; 3-state Rev. 01 — 25 July 2005 Product data sheet 1. General description The 74AUP1G126 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall

Contextual Info: 74AUP1G126 Low-power buffer/line driver; 3-state Rev. 5 — 28 June 2012 Product data sheet 1. General description The 74AUP1G126 provides a single non-inverting buffer/line driver with 3-state output. The 3-state output is controlled by the output enable input OE . A LOW level at pin OE

Contextual Info: 74AUP1G126 SINGLE BUFFER GATE WITH 3-STATE OUTPUT Description Pin Assignments The Advanced Ultra Low Power AUP CMOS logic family is designed for low power and extended battery life in portable applications. The 74AUP1G126 is a single non-inverting buffer/bus driver designed

74AUP1G126

Abstract: 74AUP1G32 JESD22-A114E 74AUP1T1326
Contextual Info: 74AUP1T1326 Low-power dual supply buffer/line driver; 3-state Rev. 01 — 20 January 2009 Product data sheet 1. General description The 74AUP1T1326 is a high-performance, low-power, low-voltage, single-bit, dual supply buffer/line driver with output enable circuitry.

Contextual Info: 74AUP1G126 www.ti.com SCES596F – JULY 2004 – REVISED MAY 2010 LOW-POWER SINGLE BUS BUFFER GATE WITH 3-STATE OUTPUT Check for Samples: 74AUP1G126 FEATURES 1 • • • • • • • Available in the Texas Instruments NanoStar Package Low Static-Power Consumption

Contextual Info: 74AUP1G126 www.ti.com SCES596F – JULY 2004 – REVISED MAY 2010 LOW-POWER SINGLE BUS BUFFER GATE WITH 3-STATE OUTPUT Check for Samples: 74AUP1G126 FEATURES 1 • • • • • • • Available in the Texas Instruments NanoStar Package Low Static-Power Consumption

Contextual Info: 74AUP1G126 www.ti.com . SCES596E – JULY 2004 – REVISED SEPTEMBER 2009 LOW-POWER SINGLE BUS BUFFER GATE WITH 3-STATE OUTPUT

A115-A

Abstract: C101 SN74AUP1G126
Contextual Info: 74AUP1G126 LOWĆPOWER SINGLE BUS BUFFER GATE WITH 3ĆSTATE OUTPUT SCES596D – JULY 2004 – REVISED JUNE 2005 D Available in the Texas Instruments D D D D D D D D Wide Operating VCC Range of 0.8 V to 3.6 V D Optimized for 3.3-V Operation D 3.6-V I/O Tolerant to Support Mixed-Mode

schematic diagram atx Power supply 500w

Abstract: pioneer PAL 012A 1000w inverter PURE SINE WAVE schematic diagram 600va numeric ups circuit diagrams winbond bios 25064 TLE 9180 infineon smsc MEC 1300 nu TBE schematic diagram inverter 2000w DK55 circuit diagram of luminous 600va UPS
Contextual Info: QUICK INDEX NEW IN THIS ISSUE! Detailed Index - See Pages 3-24 Digital Signal Processors, iCoupler , iMEMS® and iSensor . . . . . 805, 2707, 2768-2769 Connectors, Cable Assemblies, IC Sockets . . . . . . . . . . . 28-568 RF Connectors . . . . . . . . . . . . . . . . . . . . . . Pages 454-455

Contextual Info: 74AUP1G126 LOWĆPOWER SINGLE BUS BUFFER GATE WITH 3ĆSTATE OUTPUT SCES596D – JULY 2004 – REVISED JUNE 2005 D Available in the Texas Instruments D D D D D D D D Wide Operating VCC Range of 0.8 V to 3.6 V D Optimized for 3.3-V Operation D 3.6-V I/O Tolerant to Support Mixed-Mode

Contextual Info: 74AUP1G126 www.ti.com SCES596F – JULY 2004 – REVISED MAY 2010 LOW-POWER SINGLE BUS BUFFER GATE WITH 3-STATE OUTPUT Check for Samples: 74AUP1G126 FEATURES 1 • • • • • • • Available in the Texas Instruments NanoStar Package Low Static-Power Consumption

Contextual Info: 74AUP1G126 www.ti.com SCES596F – JULY 2004 – REVISED MAY 2010 LOW-POWER SINGLE BUS BUFFER GATE WITH 3-STATE OUTPUT Check for Samples: 74AUP1G126 FEATURES 1 • • • • • • • Available in the Texas Instruments NanoStar Package Low Static-Power Consumption

Contextual Info: 74AUP1G126 www.ti.com SCES596F – JULY 2004 – REVISED MAY 2010 LOW-POWER SINGLE BUS BUFFER GATE WITH 3-STATE OUTPUT Check for Samples: 74AUP1G126 FEATURES 1 • • • • • • • Available in the Texas Instruments NanoStar Package Low Static-Power Consumption

STK and STR integrated circuits

Abstract: transistor smd zG 1e STR-Z4579 Turuta 6 pin TRANSISTOR SMD CODE PA transistor 5d smd ELM85361A STK and STR integrated circuits, 2011 edition 5g smd transistor 15D diode smd code
Contextual Info: SMD-codes DATABOOK Active SMD semiconductor components marking codes • 235.000 SMD-codes for active semiconductor components: • Diodes, Transistors, Thyristors, Integrated Circuits • Case pin assignment • Pinout • Marking style • Schematic diagram

SOT-353

Contextual Info: NPA Number 022 September 2012 New Product Announcement Announcement LOGIC Advanced Ultra-Low Power Logic 74AUP1Gxx Description Advanced Ultra Low Power CMOS Single Gate Logic • 0.8 V to 3.6 V • 4 ma drive capability at 3.0 V  7 ns typical propagation time at 3V

Contextual Info: 74AUP1G126 LOWĆPOWER SINGLE BUS BUFFER GATE WITH 3ĆSTATE OUTPUT SCES596D – JULY 2004 – REVISED JUNE 2005 D Available in the Texas Instruments D D D D D D D D Wide Operating VCC Range of 0.8 V to 3.6 V D Optimized for 3.3-V Operation D 3.6-V I/O Tolerant to Support Mixed-Mode

Contextual Info: 74AUP1G126 LOWĆPOWER SINGLE BUS BUFFER GATE WITH 3ĆSTATE OUTPUT SCES596D – JULY 2004 – REVISED JUNE 2005 D Available in the Texas Instruments D D D D D D D D Wide Operating VCC Range of 0.8 V to 3.6 V D Optimized for 3.3-V Operation D 3.6-V I/O Tolerant to Support Mixed-Mode

HN SOT23

Contextual Info: 74AUP1G126 www.ti.com SCES596F – JULY 2004 – REVISED MAY 2010 LOW-POWER SINGLE BUS BUFFER GATE WITH 3-STATE OUTPUT Check for Samples: 74AUP1G126 FEATURES 1 • • • • • • • Available in the Texas Instruments NanoStar Package Low Static-Power Consumption

74AUP1T1326

Contextual Info: 74AUP1T1326 Low-power dual supply buffer/line driver; 3-state Rev. 01 — 20 January 2009 Product data sheet 1. General description The 74AUP1T1326 is a high-performance, low-power, low-voltage, single-bit, dual supply buffer/line driver with output enable circuitry.