74F27 Search Results

74ABT273

Abstract: 74F273 74FCT273
Contextual Info: 1 Q u a l it y S e m ic o n d u c t o r , I n c . High-Speed CMOS 8-Bit Register with Asynchronous Reset qs 54/74fct 273t FEATURES/BENEFITS DESCRIPTION • Pin and function compatible to the 74F273 74FCT273 and 74ABT273 • Industrial temperature -4 0 °C to 85°C

74F273

Abstract: 74F273A 74F273AD 74F273AN 74F373 74F374 74F377A
Contextual Info: Philips Semiconductors Product specification Octal D flip–flop 74F273A All outputs will be forced Low independently of Clock or Data inputs by a Low voltage level on the MR input. The device is useful for applications where the true output only is required and the CP and

M14A

Abstract: M14D MS-001 N14A 74F27 74F27PC 74F27SC 74F27SJ
Contextual Info: Revised October 2000 74F27 Triple 3-Input NOR Gate General Description This device contains three independent gates, each of which performs the logic NOR function. Ordering Code: Order Number Package Number Package Description 74F27SC M14A 14-Lead Small Outline Integrated Circuit SOIC , JEDEC MS-120, 0.150 Narrow

Contextual Info: QSFCT273T, 2273T Q High Speed CMOS 8-Bit Register with Asynchronous Reset qs5474fct273t QS54/74FCT2273T FEATURES/BENEFITS • Pin and function compatible to the 74F273 74FCT273 and 74ABT273 • CMOS power levels: <7.5 mW static • Available in DIP, SOIC, QSOP, ZIP, HQSOP

Contextual Info: QS273T, 2273T Q High-Speed CMOS 8-Bit Register with Asynchronous Reset Q S54/74FCT273T Q S54/74FCT2273T FEATURES/BENEFITS • Pin and function compatible to the 74F273 74FCT 273 and 74FCT273T • CMOS power levels: <7.5 mW static • Available in PDIP, ZIP, SOIC, QSOP, CERDIP

Contextual Info: 273 National Semiconductor 54F/74F273 Octal D Flip-Flop General Description Features The ’F273 has eight edge-triggered D-type flip-flops with in­ dividual D inputs and Q outputs. The common buffered Clock CP and Master Reset (fflR) inputs load and reset

signetics fast 74f273

Abstract: N74F273D
Contextual Info: Signetics FAST 74F273 Flip-Flop Octal D Flip-Flop FAST Products Product Specification FEATURES • High Impedance NPN bas* Inputs for reduced loading 20|iA In Low and High states • Ideal buffer for MOS microproces­ sor or memory • Eight edge-triggered D-type flipflops

118Q2

Contextual Info: Philips Semiconductors Product specification Triple 3-input NOR gate 74F27 FEATURE PIN CONFIGURATION • Industrial temperature range available –40°C to +85°C TYPE D0a 1 14 VCC D0b 2 13 D0c TYPICAL PROPAGATION DELAY TYPICAL SUPPLY CURRENT (TOTAL) D1a

74fct2273

Abstract: D5160
Contextual Info: QSFCT273T, 2273T Q High Speed CMOS 8-Bit Register with Asynchronous Reset qs54/74fct 273t qs54/74fct2273t FEATURES/BENEFITS • Pin and function compatible to the 74F273 74FCT273 and 74ABT273 • CMOS power levels: <7.5 mW static • Available in DIP, SOIC, QSOP, ZIP, HQSOP

74F273

Abstract: 74F273PC 74F273SC 74F273SJ 74F373 74F374 74F377 M20D
Contextual Info: Revised September 2000 74F273 Octal D-Type Flip-Flop General Description Features The 74F273 has eight edge-triggered D-type flip-flops with individual D inputs and Q outputs. The common buffered Clock CP and Master Reset (MR) inputs load and reset (clear) all flip-flops simultaneously.

74F27

Abstract: I74F27D I74F27N N74F27D N74F27N 74F27DC
Contextual Info: INTEGRATED CIRCUITS 74F27 Triple 3-input NOR gate Product specification IC15 Data Handbook Philips Semiconductors 1991 Feb 05 Philips Semiconductors Product specification Triple 3-input NOR gate 74F27 FEATURE PIN CONFIGURATION • Industrial temperature range available –40°C to +85°C

54F273DM

Abstract: 74F273 74F273PC 74F273SC 74F273SJ F373 F374
Contextual Info: 54F 74F273 Octal D Flip-Flop General Description Features The ’F273 has eight edge-triggered D-type flip-flops with individual D inputs and Q outputs The common buffered Clock CP and Master Reset (MR) inputs load and reset (clear) all flip-flops simultaneously

74F273

Contextual Info: 54F 74F273 Octal D Flip-Flop General Description Features The ’F273 has eight edge-triggered D-type flip-flops with individual D inputs and Q outputs The common buffered Clock CP and Master Reset (MR) inputs load and reset (clear) all flip-flops simultaneously

74F273N

Abstract: 74F273D 74F273 74F273A 74F273AD 74F273AN 74F373 74F374 74F377 0G521
Contextual Info: PHILIPS INTERNATIONAL 5Ö E ï WË 7110Û5L. 0 Q S 2 1 1 S Philips Semiconductors-Signetics FAST Products Octal D flip-flop 74F273/273A FEATURES DESCRIPTION • High impedance inputs for reduced loading 20[iA in Low and High states The 74F273 has eight edge-triggered D-type

Contextual Info: S E M IC O N D U C T O R -n 74F273 Octal D Flip-Flop General Description Features The ’F273 has eight edge-triggered D-type flip-flops with in­ dividual D inputs and Q outputs. The common buffered Clock CP and Master Reset (MR) inputs load and reset (clear) all

74ABT273

Abstract: 74F273 74FCT273 74FCT273 QSOP
Contextual Info: QS54/74FCT273T High-Speed CMOS 8-Bit Register with Asynchronous Reset Q QUALITY SEMICONDUCTOR, INC. QS54/74FCT273T FEATURES/BENEFITS DESCRIPTION • Pin and function compatible to the 74F273 74FCT273 and 74ABT273 • Industrial temperature –40°C to 85°C

Contextual Info: ÖU A L IT Y S E M I C O N D U C T O R INC b5E ]> QSFCT273T, Q • 74bbâD3 D Q G i n ? 3T3 « Ö S I 2273T High-Speed CMOS 8-Bit Fiegister with Asynchronous Reset q s s 4 /7 4 f c t 273 t qss4/74fct2273t FEATURES/BENEFITS • Pin and function compatible to the 74F273

74F273N

Abstract: 74F273AD 74F273 74F273A 74F273AN 74F273D 74F373 74F374 74F377
Contextual Info: Produci «pacification Philip» Semiconduclort-Signetfca FAST Products Octal D flip-flop 74F273/273A FEATURES DESCRIPTION • High impedance inputs for reduced loading The 74F273 has eight edge-triggered D-type flip-flops with individual D inputs and Q out­

schmitt trigger non inverting

Abstract: 74F864 3 bit magnitude comparator 74F154 74F579 74F5300 equivalent multiplexer 30 pin QUAD D FLIP-FLOP "FAST TTL" 74*545
Contextual Info: Philips Semiconductors Section 2 FAST TTL Logic Devices FAST TTL Logic Series CONTENTS 74F00 74F02 74F04 74F06 74F06A 74F07 74F07A 74F08 74F10 74F11 74F14 74F20 74F27 74F30 74F32 74F37 74F38 74F51 74F64 74F74 74F85 74F86 74F109 74F112 74F113 74F125 74F126

74F27

Abstract: 74F nor gates 74F27PC 74F27SC 74F27SJ M14A M14D N14A
Contextual Info: 74F27 Triple 3-Input NOR Gate General Description This device contains three independent gates, each of which performs the logic NOR function. Ordering Code: Commercial Package Package Description Number 74F27PC N14A 14-Lead 0.300" Wide Molded Dual-In-Line

Contextual Info: N> •Nj CO 59 National ÆÆ Semiconductor 54F/74F273 Octal D Flip-Flop General Description Features The ’F273 has eight edge-triggered D-type flip-flops with in­ dividual D inputs and Q outputs. The common buffered Clock CP and Master Reset (MR) inputs load and reset

Contextual Info: EHNational Æ m Semiconductor 54F/74F27 Triple 3-Input NOR Gate General Description This device contains three independent gates, each of which performs the logic NOR function. Ordering Code: see section 5 Logic Symbol Connection Diagrams Pin Assignment for

74F273N

Abstract: 05091
Contextual Info: Product specification Philips Semiconductors-Signetics FAST Products Octal D flip-flop 74F273/273A FEATURES DESCRIPTION • High impedance inputs for reduced loading The 74F273 has eight edge-triggered D-type flip-flops with individual D inputs and Q out­

Contextual Info: QS273T, 2273T Q High-Speed CMOS 8-Bit Hegister with Asynchronous Reset \V qs54/74fct273t qss4 /7 4 fc t 2273 t FEATURES/BENEFITS • Pin and function compatible to the 74F273 74FCT 273 and 74FCT273T • CMOS power levels: <7.5 mW static • Available in PDIP, ZIP, SOIC, QSOP, CERDIP