74FCT ORDERING INFORMATION Search Results

E2974

Abstract: 74FCT ORDERING
Contextual Info: f j j PER ICOM Ordering Information ORDERING INFORMATION Ordering Number Information - FCTXXXXT Octals PI 29/49/74FCT X X X X SiliconClock Family-PI49FCT X T X X PI 4 9 F C T XXXX XX X X 'B la nk ' = Tube X = Tape & Reel "Blank" = Tube X - Tape & Reel H = SSO P

Contextual Info: h. LA ga National ÆÆ Semiconductor 54FCT/74FCT574 Octal D Flip-Flop with TRI-STATE Outputs General Description Features The 'FCT574 is a high-speed, low power octal flip-flop with a buffered common Clock CP and a buffered common Output Enable (SE). The information presented to the D

74fct idt

Contextual Info: 564 ÆM National Semiconductor 74FCT564 Octal D Flip-Flop with TRI-STATE Outputs General Description Features The 'FCT564 is a high-speed, low power octal flip-flop with a buffered common Clock CP and a buffered common Output Enable (01). The information presented to the D

74fct

Abstract: QVSOP quality 74fct 74FCT ORDERING INFORMATION 74FCT ORDERING
Contextual Info: Q QUALITY SEMICONDUCTOR, INC. Selection Guide and Packaging Information Part Number Nomenclature Logic, QuickSwitch & Clock Management Devices QS 74FCT 2X 2 H 245 A T Q2 X Tape and Reel* Product Line 74FCT 54FCT 29FCT 74LCX 3 4A 5 7 (Optional for SMT Pkg)

Contextual Info: March 1993 54FCT/74FCT240 Inverting Octal Buffer/Line Driver with TRI-STATE Outputs General Description Features The ’FCT240 is an inverting octal buffer and line driver de­ signed to be employed as a memory address driver, clock driver and bus oriented transmitter or receiver which pro­

DT 74FCT

Contextual Info: National ÆÆ Semiconductor 54FCT/74FCT573 Octal Latch with TRI-STATE« Outputs General Description Features The 'FCT573 is a high-speed octal latch with buffered com­ mon Latch Enable LE and buffered common Output En­ able (5E) inputs. • Ice and lo z reduced to 40.0 jxA and ± 2 5 fiA

Contextual Info: March 1993 Semiconductor 54FCT/74FCT273 Octal D Flip-Flop General Description Features The ’FC T273 has eight edge-triggered D-1ype flip-flo p s w ith individual D inputs and Q outputs. T he com m on buffered Clock CP and M aster R eset (MR) input load and reset

Contextual Info: a l March 1993 Semiconductor 5 4 F C T /7 4 F C T 2 7 3 O ctal D Flip-Flop General Description Features The ’FCT273 has eight edge-triggered D-type flip-flops with individual D inputs and Q outputs. The common buffered Clock CP and Master Reset (MR) input load and reset

Contextual Info: NATIONAL SEMICON» LOGIC bS01122 0075360 441 « N S C 1 blE T> co T ~ Ì 6 - 0 7 - ( f National Semiconductor 54FCT/74FCT373 Octal Transparent Latch with TRI-STATE Outputs General Description Features The 'FCT373 consists of eight latches with TRI-STATE out­

Q74FCT

Contextual Info: NATIONAL SEUICON» L06IC blE » • b5011E2 0075431 733 1ÆM gg Semiconductor National 54FCT/74FCT574 Octal D Flip-Flop with TRI-STATE Outputs General Description Features The 'FCT574 is a high-speed, low power octal flip-flop with a buffered common Clock (CP) and a buffered common

ic 74FCT

Abstract: 74FCT VHC 240 b1 64 CERAMIC LEADLESS CHIP CARRIER LCC 74fct240p FCT Fast CMOS TTL Logic octal tri state buffer ic 74FCT240 C1995 E20A
Contextual Info: 54FCT 74FCT240 Inverting Octal Buffer Line Driver with TRI-STATE Outputs General Description Features The ’FCT240 is an inverting octal buffer and line driver designed to be employed as a memory address driver clock driver and bus oriented transmitter or receiver which provides improved PC board density

ic 74FCT

Abstract: A135 74FCT 74FCT273 C1995 E20A J20A
Contextual Info: 54FCT 74FCT273 Octal D Flip-Flop General Description Features The ’FCT273 has eight edge-triggered D-type flip-flops with individual D inputs and Q outputs The common buffered Clock CP and Master Reset (MR) input load and reset (clear) all flip-flops simultaneously

74FCT373

Contextual Info: Od -«•I w S3 National Æm Semiconductor 54FCT/74FCT373 Octal Transparent Latch with TRI-STATE Outputs General Description Features The 'FCT373 consists of eight latches with TRI-STATE out­ puts for bus organized system applications. The flip-flops appear transparent to the data when Latch Enable LE is

01D220

Abstract: 74fct563
Contextual Info: S3 National mm Semiconductor 74FCT563 Octal Latch with TRI-STATE« Outputs General Description Features The 'FCT563 is a high-speed octal latch with buffered com­ mon Latch Enable LE and buffered common Output En­ able (<5E) inputs. FACT FCT utilizes NSC quiet series technology to pro­

octal tri state buffer ic

Abstract: 74FCT T flip flop IC 74FCT534 C1995 N20B
Contextual Info: 74FCT534 Octal D Flip-Flop with TRI-STATE Outputs General Description Features The ’FCT534 is a high-speed low-power octal D-type flipflop featuring separate D-type inputs for each flip-flop and TRI-STATE outputs for bus-oriented applications A buffered Clock CP and Output Enable (OE) are common to all

Contextual Info: co co 03 Semiconductor N a tio n a l ÆM 54FCT/74FCT533 Octal Transparent Latch witl TRI-STATE Outputs General Description Features The 'FCT533 consists of eight latches with TRI-STATE out­ puts for bus organized system applications. The flip-flops appear transparent to the data when Latch Enable LE is

ic 74FCT

Contextual Info: April 1993 Semiconductor & 74FCT534 Octal D Flip-Flop with TRI-STATE Outputs General Description Features The ’FCT534 is a high-speed, low -pow er octa l D -type flipflo p featuring separate D-type inputs fo r each flip-flo p and TR I-STATE o utputs fo r bus-oriented applications. A b u ff­

ic 74FCT

Contextual Info: Semiconductor M arch 1993 54FCT/74FCT240 Inverting Octal Buffer/Line Driver with TRI-STATE Outputs General Description Features The ’ FC T240 is an inverting octal b uffe r and line driver d e ­ signed to be em ployed as a m em ory address driver, clock

811 0305 01

Abstract: 64 CERAMIC LEADLESS CHIP CARRIER LCC 74FCT E20A J20A VHC 240
Contextual Info: Semiconductor March 1993 54FCT/74FCT240 Inverting Octal Buffer/Line Driver with TRI-STATE Outputs General Description Features The ’FC T240 is an inverting octa l b u ffe r and line driver d e ­ signed to be em ployed as a m em ory address driver, clock

Contextual Info: M arch 1993 Semiconductor & 54FCT/74FCT273 Octal D Flip-Flop General Description Features The ’FCT273 has e ight edge-triggered D -type flip-flo p s w ith individual D inputs and Q outputs. The com m on buffered C lock CP and M aster R eset (MR) input load and reset

74FCT

Abstract: 74FCT534 FCT534
Contextual Info: April 1993 Semiconductor 74FCT534 Octal D Flip-Flop with TRI-STATE Outputs General Description Features The ’FC T534 is a high-speed, low -pow er octal D-type flip ­ flo p featuring separate D-type inputs fo r each flip-flop and TR I-STATE outputs fo r bus-oriented applications. A b u ff­

ST-9050

Abstract: ED0B LCX541 U/25/20/TN26/15/850/microcontroller ST7
Contextual Info: ST7MDT1-EMU2B HDS2 Series Emulator USER MANUAL Release 2.0 December 1999 Ref: DOC-ST7MDT1-EMU2B INSTRUCTIONS FOR USE—WARNING This development tool conforms to the ITE EN55022 standard for electrical/electromagnetic emissions, and to generic 50082-1 1992 edition immunity standards. It therefore complies with the 98/336/EEC

DIODE JSu

Abstract: 74FCT
Contextual Info: June 1990 54FCT/74FCT374A Octal D Flip-Flop with TRI-STATE Outputs General Description Features The ’FCT374A is a high-speed, low-power octal D-type flipflop featuring separate D-type inputs for each flip-flop and TRI-STATE outputs for bus-oriented applications. A buff­

Contextual Info: m CD54FCT245, CD74FCT245 HARRIS SEMI CONDUCTOR BiCMOS FCT Interface Logic, Octal-Bus Tranceivers, Three-State January 1997 Features Description • Buffered Inputs • Typical Propagation Delay: 5.0ns at Vcc = 5V, Ta = 25°C The CD54/74FCT245 octal bus transceiver uses a small