74H LOGIC FAMILY SPECIFICATIONS Search Results

Contextual Info: S eptem ber 1983 Revised February 1999 SEMICONDUCTOR TM MM74HC251 8-Channel 3-STATE Multiplexer General Description to the Y and W outputs. The 74H C logic fam ily is speed, function, as well as pinout com patible with the standard 74LS logic family. All inputs are protected from dam age

YC213

Abstract: 74HCTLS
Contextual Info: Z v tr e ZX S 4H C TLS ZX 74H C TLS x § m £ Î Hex Inverters February 1985 OBJECTIVE SPECIFICATIONS Features Description • Function, pin-out, speed and drive compatibility with S4/74LS logic family These devices contain six independent inverters. They

HCTLS

Abstract: 74HCTLS
Contextual Info: Z y t r e ZX S 4H C TLS Z X 74H C T LS x February 1985 # M Mm # # a / l Dual J-K Negative-Edge-Triggered Flip-Flops with Preset and Clear OBJECTIVE SPECIFICATIONS Features Description • Function, pin-out, speed and drive compatibility with 54/74LS logic family

Contextual Info: A I R C H I L D S eptem ber 1983 Revised February 1999 S E M CONDUCTOR TM MM74HC251 8-Channel 3-STATE Multiplexer General Description to the Y and W outputs. The 74H C logic fam ily is speed, function, as well as pinout com patible with the standard 74LS logic family. All inputs are protected from dam age

Contextual Info: H C M O S fa m ily characteristics F A M IL Y S P E C IF IC A T IO N S G EN E R A L These fa m ily specifications cover the com m on electrical ratings and characteristics o f the entire HCMOS 7 4H C /H C T /H C U fa m ily , unless otherwise specified in the in dividual device data sheet.

Contextual Info: SN54HC160 THRU SNS4HC163 SN 74H C 16 0 THRU SN74H C 163 SYNCHRONOUS 4 BIT DECADE AN D BINARY COUNTERS D2684, DECEMBER 1982-REVISED SEPTEMBER 1987 SN54HC' . . . J PACKAGE SN74HC’ . . . D OR N PACKAGE Internal Look Ahead for Fast Counting Carry Output for N-Bit Cascading

Contextual Info: 74H C /H C T 35 4 MSI 8 -INPUT MULTIPLEXER/REGISTER WITH TRANSPARENT LATCHES; 3 -STATE FEATURES TYPICAL • • • • • • Transparent data latches Transparent address latch Easily expanding Complementary outputs Output capability: bus driver Ic e category: MSI

Contextual Info: 74H C /H C T221 MSI SUPERSEDES D A T A OF A P R IL 1988 DUAL NON-RETRIGGERABLE MONOSTABLE MULTIVIBRATOR WITH RESET FEA TU R ES TYPICAL • • • Pulse width variance is typically less than ± 5% • Pin-out identical to “ 123" Overriding reset terminates output

201A3

Abstract: 12A2 74HL33240D 74HL33240DB 74HL33240PW
Contextual Info: Philips Semiconductors Product Specification Octal buffer/line driver; 3-state; inverting FEATURES 74HL33240 QUICK REFERENCE DATA GND = 0 V; Tarab = 25 °C; tr = t, = 2.0 ns • • • • • • • • Wide supply voltage range of 1.2 V to 3.6 V In accordance with the JEDEC

Z936

Abstract: 74HC/HCT132 HCT132 74HC 74HCT 74HCT 4 input OR gate
Contextual Info: 74HC/HCT132 SSI QUAD 2-INPUT N A N D SC H M ITT TRIG G ER FE A T U R E S TYPICAL • O utput capability: standard • Ic e category; SSI G E N E R A L D ES C R IPTIO N The 74HC/HCT132 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky

Contextual Info: 74H C /H C T191 MSI PRESETTABLE SYNCHRONOUS 4-BIT BINARY UP/DOWN COUNTER FEA TU R ES • • • TYPICAL • • Synchronous reversible counting Asynchronous parallel load Count enable control for synchronous expansion Single up/down control input Output capability: standard

74H Logic Family Specifications

Contextual Info: 74HC/HCT158 MSI Q U A D 2-INPUT M U L T IP L E X E R ; IN V E R T IN G FEATURES • • • T Y P IC A L Inverting data path Output capability: standard I q q category: M S I G E N E R A L D E S C R IP T IO N The 74HC/H CT158 are high-speed Si-gate C M O S devices and are pin

Contextual Info: 74H C/H CT163 MSI PRESETTABLE SYNCHRONOUS 4-BIT BINARY COUNTER; SYNCHRONOUS RESET FEA TU RES • • • • • • T Y P IC A L Synchronous counting and loading T w o count enable inputs fo r n-bit cascading Positive-edge triggered clo ck Synchronous reset

Contextual Info: 74H C /H CT273 MSI OCTAL D-TYPE FLIP-FLOP WITH RESET; POSITIVE-EDGE TRIGGER FEA TU R ES • T Y P IC A L SYM B O L • • Ideal buffer for MOS microprocessor or memory Common clock and master reset Eight positive edge-triggered D-type flip-flops See "377" for clock enable version

HCT04

Abstract: 74HC 74HCT
Contextual Info: 74H C /H C T04 SSI H E X IN V E R TE R FEATURES TYPICAL • O u tp u t c a p a b ility : standard • J ç c category: SSI G E N E R A L D E S C R IP T IO N The 74HC/HCT04 are high-speed Si-gate CMOS devices and are pin compatible w ith low power Schottky

B714

Abstract: a5d0 74HL33245D 74HL33245DB
Contextual Info: Philips S em ico n d uctors P roduct Specification Octal transceiver with direction pin; 3-state FEA TU R E S • • • • • • • 74HL33245 Q U IC K REFEREN CE DATA G N D = 0 V; T ^ = 25 °C; t, = t, = 2.0 ns W ide supply vo ltag e range of 1.2 V to 3.6 V

SN54HC

Contextual Info: SIU54HCT240, SN54HCT241, SN74HCT240, SN74HCT241 OCTAL BUFFERS AND LINE DRIVERS CMOS LOGIC WITH 3 STATE OUTPUTS D2804, MARCH 1984-REVISED SEPTEMBER 1987 S N 5 4 H C T ' . . . J P A C KA G E S N 7 4 H C T ' . . . DW OR N P A C K A G E • Inputs are TTL-Voltage Compatible

HCT74

Abstract: lz93 100 pin 74HC 74HCT
Contextual Info: 74H C /H C T 74 P H IL IP S IN T E R N A T IO N A L bSE D flip-flops IP H IN ^ v_ DUAL D-TYPE FLIP-FLOP WITH SET AND RESET; POSITIVE-EDGE TRIGGER FEATURES TYPIC AL • O utp u t capability: standard • Ic C cate9orV : flip-flops SYMBOL G E N E R A L D E S C R IP T IO N

texas instruments of ic 74 ls 83

Abstract: 915HC SN74HC
Contextual Info: SN54HC160 THRU SNS4HC163 SN74HC 1B 0 THRU SN74HC163 SYNCHRONOUS 4 BIT DEC AD E AN D BINARY COUNTERS 026 84 . 0ECEM8ER 1982-REVISED SEPTEMBER 1987 SN54HC’ . . - JPA C K AG E SN74HC' . . . D OR N PACKAGE Internal Look Ahead for Fast Counting • Carry Output for N-Bit Cascading

pin diagram of ic 4040 binary counter

Contextual Info: 74HC/HCT4040 MSI 12-STAGE B IN A R Y R IP P L E C O U N T E R FEATURES T Y P IC A L • Output capability: standard • >CC category: M SI G E N E R A L D E S C R IP T IO N The 74H C /H CT4040 are high-speed Si-gate C M O S devices and are pin compatible with the "4 0 4 0 ” of the

Contextual Info: 74H C /H C T 37 4 MSI OCTAL D-TYPE FLIP-FLOP; POSITIVE EDGE-TRIGGER; 3-STATE FEATURES • • • • • • TYPICAL 3-state non-inverting outputs for bus oriented applications 8 -bit positive, edge-triggered register Common 3-state output enable input Independent register and 3-state

Contextual Info: SN54HC242, SN54HC243 SN74HC242, SN74HC243 QUADRUPLE BUS TRANSCEIVERS WITH 3-STATE OUTPUTS □2684. DECEMBER 1982 - REVISED JUNE 1989 • • 2-Way Asynchronous Communication I Between Data Buses SN 54H C242, SN 54H C243 . . . J PACKAGE SN74HC242, SN 74H C243 . . . N PACKAGE

74H Logic Family Specifications

Abstract: note inverter
Contextual Info: ASSESS? CD74HC365, CD74HCT365, CD74HC366, CD74HCT366 High Speed CMOS Logic Hex Buffer/Line Driver, Three-State Non-Inverting and Inverting November 1997 Features Description • Buffered Inputs The Harris C D 74H C 365, C D 74H C T 365, C D 74H C 366, and

Contextual Info: 74HC/HCT688 M SI 8 -B IT M A G N I T U D E C O M P A R A T O R FEATURES T Y P IC A L • Com pare tw o 8-blt w ords • • O utp ut capability: standard Ic C category: M S I G E N E R A L D E S C R IP T IO N The 74HC/HCT688 are high-speed Si-gate C M O S devices and are pin