74LS AND GATE Search Results
74LS AND GATE Result Highlights (5)
Part | ECAD Model | Manufacturer | Description | Download | Buy |
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74LS681N |
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74LS681 - Octal Bus Transceivers and Registers |
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74LS12N |
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74LS12 - NAND Gate, LS Series, 3-Func, 3-Input, TTL, PDIP14 |
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DE6B3KJ101KA4BE01J | Murata Manufacturing Co Ltd | Safety Standard Certified Lead Type Disc Ceramic Capacitors for Automotive |
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DE6B3KJ331KB4BE01J | Murata Manufacturing Co Ltd | Safety Standard Certified Lead Type Disc Ceramic Capacitors for Automotive |
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DE6E3KJ102MN4A | Murata Manufacturing Co Ltd | Safety Standard Certified Lead Type Disc Ceramic Capacitors for Automotive |
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74LS AND GATE Datasheets Context Search
Catalog Datasheet | Type | Document Tags | |
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IC 74LS14
Abstract: 74ls14 74LSxx ic 74ls13
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/74LS SN54/74LS13 SN54/74LS14 IC 74LS14 74ls14 74LSxx ic 74ls13 | |
74LS14 not gate
Abstract: 74LS14 74ls14 ttl ttl 74ls14 74LS14 DATA LS14 74LS13 TTL Schmitt-Trigger Inverters 751A-02 LS13
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SN54LS/74LS13 SN54LS/74LS14 SN54/74LS13 SN54/74LS14 74LS14 not gate 74LS14 74ls14 ttl ttl 74ls14 74LS14 DATA LS14 74LS13 TTL Schmitt-Trigger Inverters 751A-02 LS13 | |
Contextual Info: M MOTOROLA. SN54/74LS90 SN54/74LS92 SN54/74LS93 DECADE COUNTER; DIVIDE-BY-TWELVE COUNTER; 4-BIT BINARY COUNTER The SN 54/74LS 90, S N 54/74LS 92 and S N 54/74LS 93 are high-speed 4-bit ripple type counters partitioned into two sections. Each counter has a divide-by-two section and either a divide-by-five (LS90), divide-by-six (LS92) or |
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SN54/74LS90 SN54/74LS92 SN54/74LS93 54/74LS modulo-12, modulo-16 | |
Contextual Info: AVG DDi Semiconductors Technical Data 192, 193 Synchronous Up/Down Decade and Binary Counters with CLEAR DV74LS192 DV74ALS192 DV74LS193 DV74ALS193 The 74LS/ALS192 is an UP/DOWN BCD Decade 8421 Counter and the 74LS/ALS193 is an UP/DOWN MODULO-16 Binary |
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DV74LS192 DV74ALS192 DV74LS193 DV74ALS193 74LS/ALS192 74LS/ALS193 MODULO-16 ALS192 LS192 | |
74ls48 PIN OUTContextual Info: <8> M OTOROLA D E S C R IP T IO N — The S N 54LS /74LS 48 and S N 54LS /74LS 49 are BCD to 7-Segm ent Decoders consisting of NAND gates, input buffers and seven AND-OR-INVERT gates. The LS49 offers active HIGH opencollector outputs for current-sourcing applications to drive logic circuits |
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/74LS 74ls48 PIN OUT | |
LS155
Abstract: 74ls155 74 ls 155 demultiplexer 74ls156
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54/74LS LS156 LS155 74ls155 74 ls 155 demultiplexer 74ls156 | |
74ALS192
Abstract: IC 74LS192 LS192 ALS192 MODULO-16 DV74LS192 DV74LS192-93 LS193
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74LS192 74ALS192 74LS/ALS193 MODULO-16 clock92-93, DV74ALS192-93 1-800-AVG-SEMI LS192, ALS192, LS192 IC 74LS192 ALS192 DV74LS192 DV74LS192-93 LS193 | |
74LS90 pin configuration
Abstract: configuration 74ls90
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54LS/74LS 54/74LS90 74LS90 pin configuration configuration 74ls90 | |
20-PIN
Abstract: M74LS37P
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M74LS37P M74LS37P b2LHfl27 0013Sbl 14-PIN 16-PIN 20-PIN | |
Contextual Info: AVG DDi Semiconductors Technical Data DV74LS190 DV74ALS190 DV74LS191 DV74ALS191 Synchronous Up/Down Decade and Binary Counters The 74LS/ALS 190 is a synchronous UP/DOWN BCD Decade counter 8421 The 74LS/ALS 191 is a synchronous UP/DOWN Modulo-16 Binary Counter. State changes of the counters are |
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DV74LS190 DV74ALS190 DV74LS191 DV74ALS191 74LS/ALS Modulo-16 ALS190 LS190 | |
74LS18PContextual Info: MITSUBISHI LSTTLs M 74LS 18P DUAL 4-IN P U T NAND SCHMITT TRIGGER DESCRIPTION The M 74LS 18P is a semiconductor integrated circuit PIN CONFIGURATION TOP VIEW containing tw o 4-input positive-logic N A N D gates having a schm itt trigger function and negative-logic N O R gates. |
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500ns, b2LHfl27 0013Sbl 74LS18P | |
74ls290
Abstract: IC 74ls290
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SN54/74LS290 SN54/74LS293 54/74LS LS290) LS293) odulo-16 LS290 74ls290 IC 74ls290 | |
ls190
Abstract: 30132 10116
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74LS/ALS Modulo-16 varieS190-191 LS190 Ci-15pF ALS190 DV74LS190-191, DV74ALS190-191 30132 10116 | |
Contextual Info: g MOTOROLA SN54/74LS290 SN54/74LS293 DECADE COUNTER; 4-BIT BINARY COUNTER The S N 54/74LS 290 and S N 54/74LS 293 are high-speed 4-bit ripple type counters partitioned into two sections. Each counter has a divide-by-two sec tion and either a divide-by-five (LS290) or divide-by-eight (LS293) section |
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SN54/74LS290 SN54/74LS293 54/74LS LS290) LS293) odulo-16 LS290 | |
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74ls51pContextual Info: MITSUBISHI LSTTLs M 74LS 51P DUAL 2 -W ID E 2 -IN P U T /3 -IN P U T AND -O R -IN VER T GATE DESCRIPTION The M 74LS 51P is a semiconductor integrated PIN CONFIGURATION TOP VIEW circuit containing dual 2-wide 2-in p u t/3 -in p u t A N D -O R -IN V E R T |
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500ns, 0013Sbl 14-PIN 16-PIN 20-PIN 74ls51p | |
74HCTLSContextual Info: h ftr e ZX54HCTLS ZX74HCTLS x § # ZX54HCTLS ZX74HCTLS Dual AND-OR-Invert Gates and Dual AND-OR Gates February 1985 OBJECTIVE SPECIFICATIONS Features Description • Function, pin-out, speed and drive compatibility with 54/74LS logic family The '51 performs the following Boolean functions: |
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54/74LS 74HCTLS: 54HCTLS: ZX54HCTLS ZX74HCTLS 74HCTLS | |
HCTLS
Abstract: 74hctls
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ZX54HCTLS ZX74HCTLS 54/74LS 74HCTLS: 54HCTLS: HCTLS 74hctls | |
HCTLS266
Abstract: 74HCTLS
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ZX54HCTLS ZX74HCTLS 54/74LS 74HCTLS: 54HCTLS: HCTLS266 74HCTLS | |
74hctlsContextual Info: Zytrex_ sags12 Triple 3-Input NAND Gates with Open-Drain Outputs February 1985 OBJECTIVE SPECIFICATIONS Features Description • Function, pin*out, speed and drive compatibility with 54/74LS logic family These devices contain three independent 3-input NAND |
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ZX54HCTLS ZX74HCTLS 54/74LS 74HCTLS: 54HCTLS: 74hctls | |
M74LS09P
Abstract: 20-PIN
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M74LS09P M74LS09P 16-PIN 20-PIN | |
74HCTLSContextual Info: Zytrex ZXS4HCTLS ZX74HCTLS February 1985 11 Triple 3-Input AND Gates O BJECTIVE S P E C IF IC A TIO N S Features Description • Function, pin-out, speed and drive compatibility with 54/74LS logic family These devices contain three independent 3-input AND |
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54/74LS 74HCTLS: 54HCTLS: ZX54HCTLS ZX74HCTLS 74HCTLS | |
Altera EP1800
Abstract: EP1800 JEDEC FORMAT EP1800 altera logicaps TTL library SCHEMA PA BUILT UP EP1800 LOGIC DIAGRAM ep18001
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EP1800 Altera EP1800 EP1800 JEDEC FORMAT EP1800 altera logicaps TTL library SCHEMA PA BUILT UP EP1800 LOGIC DIAGRAM ep18001 | |
Zytrex quad and gate
Abstract: 74hctls
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ZX54HCTLS ZX74HCTLS 54/74LS 74HCTLS: 54HCTLS: Zytrex quad and gate 74hctls | |
Zytrex OR gate
Abstract: 74HCTLS
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54/74LS 74HCTLS: 54HCTLS: ZX54HCTLS ZX74HCTLS Zytrex OR gate 74HCTLS |