74LS SERIES IC LIST Search Results

Difference between LS, HC, HCT devices

Abstract: 74HCT AN-368 difference between HC LS series 74HCT databook 74HC240 ic ttl 74ls HC LS IC difference between 74ls and 74hc ic Cmos 74 HC ttl ls
Contextual Info: Fairchild Semiconductor Application Note 368 March 1984 The 54HC/74HC series of high speed CMOS logic is unique in that it has a sub-family of components, designated 54HCT/74HCT. Generally, when one encounters a 54/74 series number, the following letters designate some speed and

tms4044

Abstract: texas 74 series TTL logic gates 74LS series logic gates TMS4044-45 TMS4044-20 TMS40L44-20 74LS series logic gates 3 input or gate TMS4044-25 TMS40L44 texas 74 series logic gates
Contextual Info: MOS LSI TMS4044, TMS40L44 4096 WORD BY 1-BIT STATIC RAMS DECEMBER 1 9 7 7 - Single + 5 - V Supply ± 1 0 % Tolerance T M S 4 0 4 4 /T M S 4 0 L 4 4 . . . NL P AC KA G E (TO P V IE W ) AO Q A1 C 2 A2 C 3 Fully S tatic Operation (No Clocks, No Refresh, No Timing Strobe)

ic 6116 from texas instruments

Abstract: ma 6116 f6 transistor tic 2250 4016 static ram tms4016
Contextual Info: MILITARY CM O S SMJ5517 2048 WORD BY 8-BIT STATIC RAM LSI DECEMBER 1 9 8 3 SMJ5517 . . . JD PACKAGE 1 TOP VIEW 2K X 8 Organization. Common I/O Single + 5 -V Supply • Fully Static Operation (No Clocks, No Refresh) A7 C 1 ^ 2 4 H vcc 23 ] A 8 22 U A 9 21 D W

40L44-45

Abstract: TMS4044 40L44
Contextual Info: MOS LSI TMS4044, TMS40L44 4096 WORD BY 1-BIT STATIC RAMS DECEMBER 1977 - REVISED MAY 1982 Single + 5-V Supply ± 1 0 % Tolerance • High Density 300-m il (7.62 mm) 18-Pin Package • T M S 40 44/T M S 40L44 . . . NL PACKAGE (TOP VIEW) AOQ A’ C 2 A 2[ 3

truth table for 4 bit magnitude comparator

Abstract: OA 161 diode T74LS85B1 LS85 T54LS85D2 T74LS85
Contextual Info: TT 4-BIT MAGNITUDE COMPARATORS DESCRIPTION The T54LS85/T74LS85 is a 4-bit Magnitude Com­ parator which compares two 4-bit words A,B , each word has four Parallel Inputs ( A o -A 3, B0 - B 3); A3, B3 being the most significant. Operation is not restricted to binary codes, the de­

Contextual Info: UNISONIC TECHNOLOGIES CO., LTD UCD4081B Preliminary CMOS IC QUAD 2-INPUT AND BUFFERED B SERIES GATE „ DESCRIPTION The UTC UCD4081B contains four independent 2-input AND gates,they perform the function Y=A • B in positive logic. „ SOP-14 FEATURES * 5V-10V-15V Parametric Ratings

IC CD4011B

Abstract: CD4011b
Contextual Info: UNISONIC TECHNOLOGIES CO., LTD CD4011B CMOS IC QUAD 2-INPUT NAND BUFFERED B SERIES GATE „ DESCRIPTION The UTC CD4011B contains four independent 2-input NAND gates which perform the function Y=A • B in positive logic. „ SOP-14 FEATURES * 5V-10V-15V Parametric Ratings

Contextual Info: UNISONIC TECHNOLOGIES CO., LTD UCD4011B Preliminary CMOS IC QUAD 2-INPUT NAND BUFFERED B SERIES GATE „ DESCRIPTION The UTC UCD4011B contains four independent 2-input NAND gates which perform the function Y=A • B in positive logic. „ SOP-14 FEATURES * 5V-10V-15V Parametric Ratings

Contextual Info: UNISONIC TECHNOLOGIES CO., LTD UCD4001B Preliminary CMOS IC QUAD 2-INPUT NOR BUFFERED B SERIES GATE „ DESCRIPTION The UTC UCD4001B contains four independent 2-input NOR gates,they perform the function Y=A+B in positive logic. „ SOP-14 FEATURES * 5V-10V-15V Parametric Ratings

IC 74l

Contextual Info: UNISONIC TECHNOLOGIES CO., LTD CD4081B Preliminary CMOS IC QUAD 2-INPUT AND BUFFERED B SERIES GATE „ DESCRIPTION The UTC CD4081B contains four independent 2-input AND gates,they perform the function Y=A • B in positive logic. „ SOP-14 FEATURES * 5V-10V-15V Parametric Ratings

cd40* quad 2-input

Abstract: CD4001B ic pin diagram cd4001b
Contextual Info: UNISONIC TECHNOLOGIES CO., LTD CD4001B Preliminary CMOS IC QUAD 2-INPUT NOR BUFFERED B SERIES GATE „ DESCRIPTION The UTC CD4001B contains four independent 2-input NOR gates,they perform the function Y=A+B in positive logic. „ SOP-14 FEATURES * 5V-10V-15V Parametric Ratings

cd4071b

Contextual Info: UNISONIC TECHNOLOGIES CO., LTD CD4071B CMOS IC QUAD 2-INPUT OR BUFFERED B SERIES GATE „ DESCRIPTION The UTC CD4071B contains four independent 2-input OR gates and they perform the function Y=A+B in positive logic. „ SOP-14 FEATURES * 5V-10V-15V Parametric Ratings

Contextual Info: UNISONIC TECHNOLOGIES CO., LTD UCD4071B Preliminary CMOS IC QUAD 2-INPUT OR BUFFERED B SERIES GATE „ DESCRIPTION The UTC UCD4071B contains four independent 2-input OR gates and they perform the function Y=A+B in positive logic. „ SOP-14 FEATURES * 5V-10V-15V Parametric Ratings

IC TTL 7432

Abstract: 74LS86 gate diagram 7411 3 INPUT AND gate IC 7432 7411 pin diagram 74LS266 IC 7486 74LS series logic gate symbols FL 9014 TTL 74126
Contextual Info: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL-TTL D16 547408, 54H/74H08, 54S/74S08, 54LS/74LS08 54/7409, 54S/74S09, 54LS/74LS09 D18 54/7411, 54H/74H11, 54S/74S11, 54LS/74LS11, 54S/74S15, 54LS/74LS15 D17 9S41 1^1FH [iä| [vii Eòi [T| r»1 Vcc Vcc füi Fai np f i ! Föi lyi rn

tc5517

Abstract: TMS4016 SRAM TMS4016 MB8416 A2187 eprom 2516 HM6116 TMS2516 CD 4016 PIN DIAGRAM 74ALSTTL
Contextual Info: MILITARY CMOS LSI SMJ5517 2048-WORD BY 8-BIT STATIC RAM DECEMBER 1 9 8 3 SM J6517 2K X 8 Organization. Common I/O JEDEC Standard Pinout • 24-Pin 6 0 0 -M il 1 5 .2 mm Package Configuration • Pin Compatible w ith T M S 2 5 1 6 , T M S 4 0 1 6 , M B 8 4 1 6 , H M 6 1 1 6 , and T C 5 5 1 7

Contextual Info: GEC P LES S EY ^ I M I ( \ I) U t, T O K 15HSC Series Radiation Hard High Speed C M O S/SO S Logic S (Advanced Data) S10505ASF Issue 1.2 November 1990 Features • Radiation Hard to 1.5jim C M O S/SO S technology • High SEU immunity • Latch up free

S2716

Abstract: tms2716
Contextual Info: TMS2716 2048 WORD BY 8-BIT ERASABLE PROGRAMMABLE READ ONLY MEMORIES MOS LSI DECEMBER 1 9 7 9 - M S 2 7 1 6 . . . JL PACKAGE TOP VIEW 2 0 4 8 X 8 Organization All Inputs and Outputs Fully TTL Compatible A 7 C 1 ^ 2 4 D V CC(PE) A6 j j 2 23 3 A8 22 D A9 A5C 3

Contextual Info: CD74HC42, ^T42 h a f r f r is S E M I C O N D U C T O R High Speed CMOS Logic BCD To Decimal Decoder 1 of 10 August 1997 Features Description • Buffered Inputs and Outputs The Harris CD74HC42, CH74HCT42 BCD-to-Decimal Decoders utilize silicon-gate CMOS technology to achieve

TMS4045

Contextual Info: TMS2114, TMS2114L 1024-WORD BY 4-BIT STATIC RAMS MOS LSI D E C E M B E R 1 9 7 9 - R E V IS E D A U G U S T 1 9 8 3 Previously Called TM S4045/T M S40L45 T M S2114, T M S2114L . . . NL PACKAG E T O P V IE W 1024 X 4 Organization Single + 5-V Supply Fully Static Operation (No Clocks, No

Am2913

Contextual Info: Am2913 Am 2913 Priority Interrupt Expander DISTINCTIVE CHARACTERISTICS • • • Similar in function to Am54LS/74LS/25LS148/2513 Gated three-state output Advanced Low-Power Schottky processing Encodes eight lines to three-line binary Expands use of Am2914

Contextual Info: CD74HC20, h a f r f r is S E M I C O N D U C T O R ^ T 2 High Speed CMOS Logic Dual 4-Input NAND Gate August 1997 Features Description • Buffered Inputs The Harris CD74HC20, CD74HCT20, logic gates utilize silicon gate CMOS technology to achieve operating speeds

D74HC10

Contextual Info: CD74HC10,0 h a r r is S E M I C O N D U C T O R High Speed CMOS Logic Triple 3-lnput NAND Gate August 1997 Features Description • Buffered Inputs The Harris CD74HC10, CD74HCT10, logic gates utilize silicon gate CMOS technology to achieve operating speeds

Contextual Info: CD74HC21, h a f r f r is S E M I C O N D U C T O R ^ T 2 1 High Speed CMOS Logic Dual 4-Input AND Gate August 1997 Features Description • Buffered Inputs The Harris CD74HC21, CD74HCT21, logic gates utilize silicon gate CMOS technology to achieve operating speeds

Contextual Info: CD54HCT32, CD74HC32, CD74HCT32 HARRIS S E M I C O N D U C T O R High Speed CMOS Logic Quad 2-Input OR Gate August 1997 Features Description • Typical Propagation Delay: 7ns at Vcc = 5V, C L = 15pF, Ta = 25°C The Harris CD74HC32, CD74HCT32 contain four 2-input OR