74LS TTL Search Results

octal Bilateral Switches

Abstract: MM74HC14M MM74HC138M CD4025BCM MM74HC00M MM74HC74AM MM74HC125M MM74HC04M cd4046bcm cd4052bcm
Contextual Info: 1/3 CMOS LOGIC MM74HC SERIES MM74HCT/U SERIES • HIGH SPEED CMOS TECHNOLOGY, CMOS DRIVE LEVELS, SPEED COMPARABLE TO 74LS SERIES Part Number Description • HIGH SPEED CMOS TECHNOLOGY, TTL DRIVE LEVELS, SPEED COMPARABLE TO 74LS SERIES SQP £ ea. Gates & Inverters

IC 74LS14

Abstract: 74ls14 74LSxx ic 74ls13
Contextual Info: M OTOROLA SN54/74LS13 SN54/74LS14 SCHMITT TRIGGERS DUAL GATE/HEX INVERTER The S N 54LS /74LS 13 and SN 54LS /74LS 14 contain logic gates/inverters which accept standard TTL input signals and provide standard TTL output levels. They are capable of transforming slowly changing input signals into

Contextual Info: M MOTOROLA. SN54/74LS90 SN54/74LS92 SN54/74LS93 DECADE COUNTER; DIVIDE-BY-TWELVE COUNTER; 4-BIT BINARY COUNTER The SN 54/74LS 90, S N 54/74LS 92 and S N 54/74LS 93 are high-speed 4-bit ripple type counters partitioned into two sections. Each counter has a divide-by-two section and either a divide-by-five (LS90), divide-by-six (LS92) or

74LS14 not gate

Abstract: 74LS14 74ls14 ttl ttl 74ls14 74LS14 DATA LS14 74LS13 TTL Schmitt-Trigger Inverters 751A-02 LS13
Contextual Info: MOTOROLA SN54/74LS13 SN54/74LS14 SCHMITT TRIGGERS DUAL GATE/HEX INVERTER The SN 54LS /74LS 13 and S N 54LS /74LS 14 contain logic gates/inverters which accept standard TTL input signals and provide standard TTL output levels. They are capable of transforming slowly changing input signals into

lm294oct

Abstract: d71054c D71055C lm294oct-12 74c928 7486 XOR GATE interfacing ADC 0808 with 8086 microprocessor 555 7490 7447 7 segment LED display Motorola 74LS76 NEC D71055C
Contextual Info: Integrated Circuits 74LS Series Featuring better performance than standard 7400 series devices, the 74LS series also uses about 1/5th the power. Part# Pins Description 74LS00 74LS01 74LS02 74LS03 74LS04 74LS05 74LS06 74LS07 74LS08 74LS09 74LS10 74LS11 74LS12

LS623

Abstract: D2537 SN74LS620
Contextual Info: S N 54LS 620, SN 54LS621, SN 74LS 620, SN 74LS 621, SM 74LS623 OCTAL BUS TRANSCEIVERS D2537, AUGUST 1979-REVISEO MARCH 1988 SN 54LS620, S N 54LS621, S N & 4 L S 6 2 2 . . . J P AC K A G E S N 74LS 620, S N 74LS621, S N 7 4 L S 6 2 3 . . . D W O R N P AC K A G E

LS748

Abstract: 74LS147 74LS148 74lS748
Contextual Info: g MOTOROLA SN54/74LS147 SN54/74LS148 SN54/74LS748 10-LINE-TO-4-LINE AND 8-LINE-TO-3-LINE PRIORITY ENCODERS The S N 54/74LS 147 and the SN 54/74LS 148 are Priority Encoders. They provide priority decoding of the inputs to ensure that only the highest order

4QFC

Abstract: S62D
Contextual Info: SN54LS595, SN54LS596, SN74LS595, SN74LS596 8 BIT SH IFT REGISTERS W ITH O U TPU T LATC H ES 02634, JANUARY 1981 - REVISED MARCH 1988 S N 54LS 595, SN64LS596 . . . J OR W PACKAGE SN 74LS 595, S N 74LS 596 . . . N PACKAGE 8-Bit Serial-ln, Parallel-Out Shift

Contextual Info: MOTOROLA SN54/74LS168 SN54/74LS169 BCD DECADE/MODULO 16 BINARY SYNCHRONOUS BI-DIRECTIONAL COUNTERS The SN 54/74LS 168 and SN 54/74LS 169 are fully synchronous 4-stage up/down counters featuring a preset capability for programmable operation, carry lookahead for easy cascading and a U /D input to control the direction

74LS147

Abstract: 74LS148 74ls748 LS748 PIN 74LS147 LS148 ttl 74ls147 LS 74LS147 6200S ttl 74ls148
Contextual Info: <8 > MOTOROLA SN54/74LS147 SN54/74LS148 SN54/74LS748 10-LINE-TO-4-LINE AND 8-LINE-TO-3-LINE PRIORITY ENCODERS The S N 54/74LS 147 and the S N 54/74LS 148 are Priority Encoders. They provide priority decoding of the inputs to ensure that only the highest order

pin DIAGRAM OF IC 74ls75

Abstract: 74LS75 logic Ic 74
Contextual Info: M M O T O R O L A SN54/74LS75 SN54/74LS77 4-BIT D LATCH The TTL/MSI S N 54/74LS 75 and S N 54/74LS 77 are latches used as tem ­ porary storage for binary information between processing units and input/out­ put or indicator units. Information present at a data (D) input is transferred to

LS155

Abstract: 74ls155 74 ls 155 demultiplexer 74ls156
Contextual Info: MOTOROLA SN54/74LS155 SN54/74LS156 DUAL 1-0F-4 DECODER/ DEMULTIPLEXER The SN 54/74LS 155 and S N 54/74LS 156 are high speed Dual 1-of-4 Decoder/Demultiplexers. These devices have two decoders with common 2-bit Address inputs and separate gated Enable inputs. Decoder “a” has an

74LS299 APPLICATIONS

Contextual Info: M MOTOROLA SN54/74LS323 8-BIT SHIFT/STORAGE REGISTER WITH 3-STATE OUTPUTS The S N 54/74LS 323 is an 8-Bit Universal S hift/S torage Register with 3-state outputs. Its function is sim ilarto the SN 54/74LS 299 with the exception of Synchronous Reset. Parallel load inputs and flip-flop outputs are

Contextual Info: M MOTOROLA SN54/74LS490 DUAL DECADE COUNTER The S N 54/74LS 490 contains a pair of high-speed 4-stage ripple counters. Each half of the S N 54/74LS 490 has individual Clock, Master Reset and Mas­ ter Set (Preset 9) inputs. Each section counts in the 8, 4, 2, 1 BCD code.

74ls290

Abstract: IC 74ls290
Contextual Info: MOTOROLA SN54/74LS290 SN54/74LS293 DECADE COUNTER; 4-BIT BINARY COUNTER The SN 54/74LS 290 and S N 54/74LS 293 are high-speed 4-bit ripple type counters partitioned into two sections. Each counter has a divide-by-two sec­ tion and either a divide-by-five LS290 or divide-by-eight (LS293) section

74ls48 PIN OUT

Contextual Info: <8> M OTOROLA D E S C R IP T IO N — The S N 54LS /74LS 48 and S N 54LS /74LS 49 are BCD to 7-Segm ent Decoders consisting of NAND gates, input buffers and seven AND-OR-INVERT gates. The LS49 offers active HIGH opencollector outputs for current-sourcing applications to drive logic circuits

SC74HC595

Abstract: SC74HC595C SC74HC595D sc74hc
Contextual Info: SC74HC595 8 3S SC74HC595 8 CMOS / 8 SOP-16-300-1.27 54LS/74LS SOP-16-225-1.27 54LS/74LS SSOP-16-300-0.65 SCK RCK SCK SI RCK SCLR DIP-16-300-2.54 TSSOP-16-225-0.65 G * 2~6V * 1µA * 15 * * SC74HC595 DIP-16-300-2.54 SC74HC595A SOP-16-225-1.27 fmax=55MHz VCC=5V

74ls399

Abstract: Motorola 74LS 74LS398N
Contextual Info: M MOTOROLA SN54/74LS398 SN54/74LS399 QUAD 2-PORT REGISTER The S N 54/74LS 398 and SN 54/74LS 399 are Quad 2-Port Registers. They are the logical equivalent of a quad 2-input m ultiplexer followed by a quad 4-bit edge-triggered register. A Common Select input selects between two 4-bit in­

Contextual Info: g MOTOROLA SN54/74LS348 SN54/74LS848 8-INPUT PRIORITY ENCODERS WITH 3-STATE OUTPUTS The SN 54/74LS 348 and the S N 54/74LS 848 are eight input priority encod­ ers which provide the 8-line to 3-line function. The outputs (A 0 -A 2 ) and inputs ( 0 - 7 ) are active low. The active low input

Contextual Info: g MOTOROLA SN54/74LS290 SN54/74LS293 DECADE COUNTER; 4-BIT BINARY COUNTER The S N 54/74LS 290 and S N 54/74LS 293 are high-speed 4-bit ripple type counters partitioned into two sections. Each counter has a divide-by-two sec­ tion and either a divide-by-five (LS290) or divide-by-eight (LS293) section

74LS490

Contextual Info: M M O T O R O L A SN54LS490 SN74LS490 D ES C R IP T IO N — The S N 54LS /74LS 490 contains a pair of high­ speed 4-stage ripple counters. Each half of the S N 54LS /74LS 490 has individual Clock. M aster Reset and M aster Set (Preset 9) inputs. Each

SN74LS604

Contextual Info: SN54LS604, SN54LS606, SN54LS607, SN74LS604, SN74LS606, SN74LS607 OCTAL 2-INPUT MULTIPLEXED LATCHES D254-5, JULY 1979-REVISED MARCH 1988 T IM 9 9 6 0 4 , T IM 9 9 6 0 6 , T IM 9 9 6 0 7 SN 54LS 604, SN 54LS 606, SN 54LS607 . . JO PACKAGE SN 74LS 604, SN 74LS 606. SN 74LS607 . . . JD OR N PACKAGE

74Ls79

Contextual Info: M MOTOROLA SN54/74LS795 SN54/74LS796 SN54/74LS797 SN54/74LS798 TRI-STATE OCTAL BUFFERS The S N 54/74LS 795 thru S N 54/74LS 798 device types provide a second source for the 7 1 /8 1 LS95 thru 71 /81LS 98 series. These devices are octal low power Schottky versions of the 70/8095 thru 70/8098 3-STATE Hex

Contextual Info: M M O T O R O L A SN54/74LS168 SN54/74LS169 BCD DECADE/MODULO 16 BINARY SYNCHRONOUS BI-DIRECTIONAL COUNTERS The SN 54/74LS 168 and SN 54/74LS 169 are fully synchronous 4-stage up/down counters featuring a preset capability for programmable operation, carry lookahead for easy cascading and a U /D input to control the direction