74LVQ32 Search Results

74LVQ32

Abstract: 74LVQ32M 74LVQ32MTR 74LVQ32TTR TSSOP14
Contextual Info: 74LVQ32 LOW VOLTAGE CMOS QUAD 2-INPUT OR GATE • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD = 5.2 ns TYP. at VCC = 3.3 V COMPATIBLE WITH TTL OUTPUTS LOW POWER DISSIPATION: ICC = 2µA (MAX.) at TA=25°C LOW NOISE: VOLP = 0.3V (TYP.) at VCC = 3.3V

KHN 10

Abstract: 74LVQ32 74LVQ32M 74LVQ32T TSSOP14
Contextual Info: = 7 SGS-THOMSON k 7# R fflD iS^ lllL[l eT n ^ D S!lD © S 74LVQ32 QUAD 2-IN PU T O R GATE . HIGH SPEED: tPD = 5 ns (TYP. at V Cc =3.3V . COMPATIBLEWITH TTL OUTPUTS . LOW POWER DISSIPATION: Icc = 2 |xA (MAX.) at T a = 25 °C . LOW NOISE: V o lp = 0.3 V (TYP.) at V Cc = 3.3V

74LVQ32

Abstract: 74LVQ32M 74LVQ32T TSSOP14
Contextual Info: 74LVQ32 QUAD 2-INPUT OR GATE • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD = 5 ns TYP. at VCC = 3.3V COMPATIBLEWITH TTL OUTPUTS LOW POWER DISSIPATION: ICC = 2 µA (MAX.) at TA = 25 oC LOW NOISE: VOLP = 0.3 V (TYP.) at VCC = 3.3V 75Ω TRANSMISSION LINE DRIVING

74LVQ32

Abstract: 74LVQ32SC 74LVQ32SCX 74LVQ32SJ 74LVQ32SJX M14A
Contextual Info: LVQ32 National Semiconductor 74LVQ32 Low Voltage Quad 2-Input OR Gate General Description Features The LVQ32 contains four, 2-input OR gates. • ideal for low power/low noise 3.3V applications ■ Guaranteed simultaneous switching noise level and dy­ namic threshold performance

74LVQ32

Abstract: 74LVQ32SC 74LVQ32SJ M14A M14D
Contextual Info: 74LVQ32 Low Voltage Quad 2-Input OR Gate General Description Features The LVQ32 contains four 2-input OR gates. n Ideal for low power/low noise 3.3V applications n Guaranteed simultaneous switching noise level and dynamic threshold performance n Guaranteed pin-to-pin skew AC performance

Contextual Info: rrr sgs-thom son ^7# [ * l m iO T ( e * S 74LVQ32 QUAD 2-INPUT OR GATE . HIGH SPEED: tro = 5 ns (TYP. at Vcc = 3.3V . COMPATIBLEWITH TTL OUTPUTS . LOW POWER DISSIPATION: Ice = 2 jiA (MAX.) at Ta = 25 °C . LOW NOISE: V olp = 0.3 V (TYP.) at Vcc = 3.3V . 75£2 TRANSMISSION LINE DRIVING

Contextual Info: LVQ32 fciME D b5Gl]i22 007b3öb ÔS7 « N S C l INational I Semiconductor 54LVQ/74LVQ32 Low Voltage Quad 2-Input OR Gate General Description Features The 'LVQ32 contains four, 2-input OR gates. • ideal for low power/low noise 3.3V applications ■ Guaranteed simultaneous switching noise level and dy­

Contextual Info: Æ T SGS-THOMSON D lsi S IILICTIs! iD©S 74LVQ32 QUAD 2-INPUT OR GATE . HIGH SPEED: tPD = 5 ns (TYP.) a tV c c =3.3V . COMPATIBLEWITH TTL OUTPUTS . LOW POWER DISSIPATION: Ice = 2 |xA (MAX.) at T a = 25 °C . LOW NOISE: V o lp = 0.3 V (TYP.) at V c c = 3.3V

TTL 3 input or gate

Abstract: 74LVQ32 74LVQ32MTR 74LVQ32TTR TSSOP14
Contextual Info: 74LVQ32 LOW VOLTAGE CMOS QUAD 2-INPUT OR GATE • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD = 5.2 ns TYP. at VCC = 3.3 V COMPATIBLE WITH TTL OUTPUTS LOW POWER DISSIPATION: ICC = 2µA (MAX.) at TA=25°C LOW NOISE: VOLP = 0.3V (TYP.) at VCC = 3.3V

Contextual Info: LVQ32 £3 ÆM National Semiconductor 54LVQ/74LVQ32 Low Voltage Quad 2-Input OR Gate General Description Features The 'LVQ32 contains four, 2-input OR gates. * Ideal for low power/low noise 3.3V applications Guaranteed simultaneous switching noise level and dy­

74LVQ32

Abstract: 74LVQ32M 74LVQ32MTR 74LVQ32TTR TSSOP14
Contextual Info: 74LVQ32 LOW VOLTAGE CMOS QUAD 2-INPUT OR GATE • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD = 5.2 ns TYP. at VCC = 3.3 V COMPATIBLE WITH TTL OUTPUTS LOW POWER DISSIPATION: ICC = 2µA (MAX.) at TA=25°C LOW NOISE: VOLP = 0.3V (TYP.) at VCC = 3.3V

74LVQ32

Abstract: 74LVQ32MTR 74LVQ32TTR TSSOP14
Contextual Info: 74LVQ32 LOW VOLTAGE CMOS QUAD 2-INPUT OR GATE • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD = 5.2 ns TYP. at VCC = 3.3 V COMPATIBLE WITH TTL OUTPUTS LOW POWER DISSIPATION: ICC = 2µA (MAX.) at TA=25°C LOW NOISE: VOLP = 0.3V (TYP.) at VCC = 3.3V

74LVQ32

Abstract: 74LVQ32SC 74LVQ32SCX 74LVQ32SJ 74LVQ32SJX M14A M14D
Contextual Info: 74LVQ32 Low Voltage Quad 2-Input OR Gate General Description Features The LVQ32 contains four 2-input OR gates Y Y Y Y Y Ideal for low power low noise 3 3V applications Guaranteed simultaneous switching noise level and dynamic threshold performance Guaranteed pin-to-pin skew AC performance

Contextual Info: E M IC O N D U C T Q R r 74LVQ32 Low Voltage Quad 2-Input OR Gate General Description Features The LVQ32 contains four 2-input OR gates. • Ideal for low power/low noise 3.3V applications ■ Guaranteed simultaneous switching noise level and dynamic threshold performance

74LVQ32

Abstract: 74LVQ32M 74LVQ32T TSSOP14
Contextual Info: 74LVQ32 QUAD 2-INPUT OR GATE • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD = 5 ns TYP. at VCC = 3.3V COMPATIBLEWITHTTL OUTPUTS LOW POWER DISSIPATION: ICC = 2 µA (MAX.) at TA = 25 oC LOW NOISE: VOLP = 0.3 V (TYP.) at VCC = 3.3V 75Ω TRANSMISSION LINE DRIVING

Contextual Info: 74LVQ32 QUAD 2-INPUT OR GATE . HIGH SPEED: tpD = 5 ns TYP. at Vcc = 3.3V . COMPATIBLEWITHTTL OUTPUTS . LOW POWER DISSIPATION: Ic c = 2 |oA (MAX.) at T a = 25 °C . LOW NOISE: V o l p = 0.3 V (TYP.) at V c c = 3.3V . 75Q TRANSMISSION LINE DRIVING CAPABILITY

Contextual Info: S E M IC O N D U C T O R Low 74LVQ32 L o w V o l t a g e Q u a d 2 - I n p u t OR G a t e • Ideal lor low power/low noise 3.3V applications ■ Guaranteed simultaneous switching noise level and dynamic threshold performance ■ Guaranteed pin-to-pin skew AC performance

74LVQ32

Abstract: 74LVQ32SC 74LVQ32SJ M14A M14D
Contextual Info: S E M IC O N D U C T O R tm 74LVQ32 Low Voltage Quad 2-Input OR Gate General Description Features The LVQ32 contains four 2-input O R gates. • Ideal for low pow er/low noise 3.3V applications ■ G uaranteed sim ultaneous sw itching noise level and d ynam ic threshold perform ance

Contextual Info: National LVQ32 & Semiconductor 74LVQ32 Low Voltage Quad 2-Input OR Gate General Description Features The LVQ32 contain:; four, 2-input OR gates. • Ideal for low power/low noise 3.3V applications ■ Guaranteed simultaneous switching noise level and dy­

74LVQ32

Abstract: 74LVQ32SC 74LVQ32SJ M14A M14D
Contextual Info: Revised June 2001 74LVQ32 Low Voltage Quad 2-Input OR Gate General Description Features The LVQ32 contains four 2-input OR gates. • Ideal for low power/low noise 3.3V applications ■ Guaranteed simultaneous switching noise level and dynamic threshold performance

5555 FAIRCHILD optocoupler

Abstract: MC74HC374N 74hc14n equivalent NC7S125M5 14069 HCF4541BEY APPLICATION HCF4013BE 4026 fairchild datasheet 14543 motorola Motorola DM74LS139N
Contextual Info: R E L I A B L E . L O G I C . I N N O V A T I O N . Logic Cross-Reference Logic Cross-Reference 2003 Texas Instruments Printed in the U.S.A. by Texoma Business Forms, Durant, Oklahoma Printed on recycled paper. SCYB017A NEW First Revision Logic Cross-Reference

SO14

Abstract: TSSOP14 SO-14 TSSOP-14 TSSOP16 TSSOP-16 74LVQ02 74LVQ04 74LVQ125 74LVQ14
Contextual Info: LOGIC CIRCUITS LOW VOLTAGE HIGH SPEED CMOS - LVQ 74LVQ SERIES FEATURES Symbol VCC VI TA IOL tpd Parameter Supply Voltage Input Voltage Operating Temperature 74 Series Output Current Propagation Delay time @ VCC = 3.3V Value Unit 3.0 to 3.6 0 to VCC – 40 to 85

Contextual Info: ALPHANUMERICAL INDEX LCX FAMILY Type Number Function Package Page Number 51 74LCX00 Quad 2-Input NAND Gate with 5V Tolerant Input TSS0P/S014 74LCX02 Quad 2-Input NOR Gate with 5V Tolerant Input TSS0P/S014 57 74LCX04 Hex Inverter with 5V Tolerant Input TSS0P/S014

FQPF*7N65C APPLICATIONS

Abstract: bc548 spice model bf494 spice model spice model bf199 LM3171 BC517 spice model bc547 spice model BF494 spice MOC3043-M spice model SPICE model BC237
Contextual Info: Fairchild PSG.book Page i Wednesday, July 28, 2004 11:12 AM Fairchild Semiconductor Product Catalog Rev. 1 Analog & Mixed Signal Discrete Power Interface & Logic Microcontrollers Optoelectronics RF Power Front Matter.fm Page ii Monday, August 2, 2004 10:09 AM