752S6 Search Results

Contextual Info: SN54ALS323, SN74ALS323 8-BIT UNIVERSAL SHIFT/STORAGE REGISTERS WITH SYNCHRONOUS CLEAR AND 3-STATE OUTPUTS SDAS267A- DECEMBER 1982 - REVISED DECEMBER 1994 SN54ALS323. . . J PACKAGE SN74ALS323. . . DW OR N PACKAGE TOP VIEW Multiplexed I/O Ports Provide Improved Bit

p521 bl

Abstract: p521 b 30405Q
Contextual Info: SN54AS885, SN74AS885 8-BIT MAGNITUDE COMPARATORS SDAS236A- DECEMBER 1982 - REVISED JANUARY 1995 Latchable P-lnput Ports With Power-Up Clear Choice of Logical or Arithmetic Two’s Complement Comparison Data and PLE Inputs Utilize pnp Input Transistors to Reduce dc Loading Effects

Contextual Info: SN54ALS874B, SN74ALS874B, SN74ALS876A SN74AS874, SN74AS876 DUAL 4-BIT D-TYPE EDGE-TRIGGERED FLIP-FLOPS SDAS061C - APRIL 1982 - REVISED JANUARY 1995 SN54ALS874B. . . JT PACKAGE SN74ALS874B, SN74AS874 . . . DW OR NT PACKAGE TOP VIEW • 3-State Buffer-Type Outputs Drive Bus

Contextual Info: SN74ALS758 QUADRUPLE BUS TRANSCEIVER WITH OPEN-COLLECTOR OUTPUTS SDAS07BB-DECEMBER 1983-R EV IS ED JANUARY 1995 D OR N PACKAGE {TOP VIEW • TWo-Way Asynchronous Communication Between Data Buses • pnp Inputs Reduce dc Loading • Package Options Include Plastic

dual decade counter SN74490

Abstract: counter 74490 74490 counter SN 74490 sn5449 SN74LS90 Decade Counter texas instruments LS490 SN5490A SN7490 SN54LS90
Contextual Info: TYPES SN54490, SN54LS490, SN74490, SN74LS490 DUAL 4 -BIT DECADE COUNTERS OCTOBER 1 9 7 6 —R E V IS E D D E C E M B E R 1983 S N 5 4 4 9 0 ,S N 6 4 t S 4 9 0 I OR W PACKAGE S N 7 4 4 3 0 . . . J OR N PACKAGE S N 7 4 L S 4 9 0 . . . D . J OR N PACKAGE Dual Versions o f Popular SN5490A, SN54LS90,

EIA-485

Abstract: SN65LBC172 SN75172 SN75LBC172 SN75LBC173 SN75LBC175
Contextual Info: SN65LBC172, SN75LBC172 QUADRUPLE LOW-POWER DIFFERENTIAL LINE DRIVER SLLS163-JULY 1993 • • • • N PACKAGE [TOP VIEW Meet or Exceed EIA Standard RS-485 Designed for High-Speed Multipoint Transmission on Long Bus Lines in Noisy Environments Support Data Rates up to and Exceeding

ep330

Abstract: EP330-15CN EP330-12CN SRES002A EP330-12CFN EP330-25IN HVEPIC EP330-25IFN D3374 PAL16L8 programming specifications
Contextual Info: CD^^n C E R IE C HIGH-PERFORMANCE 8-MACROCELL ONE-TIME PROGRAMMABLE LOGIC DEVICES _SRES002A - D3374. OCTOBER 1969- REVISED SEPTEM BER 1992 N PACKAG E TOP VIEW Programmable Replacement for Conventional TTL, 74HC, and 20-Pin PLD Family C LK /I [ 1

TICPAL16R4

Abstract: TICPAL16R6-55C
Contextual Info: TICPAL16L8-55C, TICPAL16R4-55C, TICPAL16R6-55C, TICPAL16R8-55C STANDARD CMOS PAL CIRCUITS SRPS027 - P3062, NOVEMBER 1987 - REVISED MARCH 1992 TICPAL16L8' JL OR N PACKAGE Standard 20-Pin PLD Family TOP VIEW Virtually Zero Standby Power Propagation Delay Time. . . 55 ns Max

D3323

Abstract: 22v10z 30INT transistor k 525
Contextual Info: TICPAL22V10Z-25C, TICPAL22V10Z-30I EPIC CMOS PROGRAMMABLE ARRAY LOGIC CIRCUITS _SRPS007C - D3323. SEPTEMBER 1989 - REVISED FEBRUARY 1992 JTL AND NT PACKAGE TOP VIEW 24-Pin Advanced CMOS PLD Virtually Zero Standby Power CLK/ Propagation Delay Time:

Contextual Info: SN74ACT7811 1024 x 18 CLOCKED FIRST-IN, FIRST-OUT MEMORY _SCAS151C - JANUAR Y 1981 - R E V IS E D FEBRUARY 1996 • Member of the Texas Instruments Wldebus Family • Input-Ready, Output-Ready, and Half-Full Flags • Independent Asynchronous Inputs and

Contextual Info: CDC587 3.3-V PHASE-LOCK LOOP CLOCK DRIVER WITH 3-STATE OUTPUTS _ SCAS562B- DECEMBER 1996 - REVISED JULY 1998 DQG PACKAGE TOP VIEW • Operates at 3.3-V Vqc • Distributes One Clock Input to 16 Outputs • Four Select Inputs Configure Output

Contextual Info: SN54AS1032A, SN74AS1032A QUADRUPLE 2-INPUT POSITIVE-OR BUFFERS/DRIVERS SDAS072B-DECEMBER 1982-R E V IS E D JANUARY 1995 Driver Version of 'AS32 High Capacltlve-Drlve Capability Package Options Include Plastic Small-Outllne D Packages, Ceramic Chip Carriers (FK), and Standard Plastic (N) and

EP330-12CN

Abstract: EP330 EP330-15CN EP330-15C EP330-15 EP330-15CFN
Contextual Info: C D f« C C D IC C HIGH-PERFORMANCE 8-MACROCELL ONE-TIME PROGRAMMABLE LOGIC DEVICES _ SRES002A - D3374, OCTOBER 1 9 8 9 - REVISED SEPTEMBER 1992 N PACKAGE Programmable Replacement for Conventional TTL, 74HC, and 20-Pin PLD Family TOP VIEW) High-Voltage EPIC Process Allows for

ha 7741

Abstract: 7741 8 PIN bt458 diode p4b pin diagram of ic 4511 BROOKTREE Bt451 c3405 cr 4180 r4 p60 hall RS-343-A
Contextual Info: IV 0 5 W 9I TLC34051 ,TLC34058 256 x 12 or 24 COLOR PALETTES D 3306, O C TO BER 1990 LinEPIC 1-jim CMOS Process • Direct Interface to TMS340XX Graphics Processors • Standard Microprocessor Unit MPU Palette Interface 135-MHz Pipelined Architecture