8 PINS IC SOCKET Search Results

8F25

Contextual Info: îF a sf Lo g ic pi Multiple Digital iy \c SERIES: MDU-38F Delay Units 8 pins DIP T T L Interfaced devices^inc. Features: • Auto-insertable. ■ Completely interfaced for TTL & DTL application. ■ P.C. board space economy achieved. ■ Fits standard 8 pins DIP socket.

Contextual Info: F a s t L o g ic Multiple Digital Delay Units MDU-28 F S ER IES : 8 pins DIP T T L Interfaced data delay W devices;Inc. Features: • ■ ■ ■ ■ ■ A uto-insertable. Low cost. C o m p le te ly in terfaced for TTL. Low profile. Fits standard 8 pins DIP socket.

DPG-41

Contextual Info: zFast L o g ic data delay devices; me. Delayed Pulse Generator SERIES: T2L Interfaced 8 pin DIP DPG-41 Features: • ■ ■ ■ Low Cost. Completely interfaced for TTL. Low profile. Fits standard 8 pins DIP socket. Specifications: ■ ■ ■ ■ ■ ■

Contextual Info: -Fa s t L o g ic Delayed Pulse Generator SERIES: DPG-41 T*L Interlaced 8 pin DIP Features: • ■ ■ ■ Low Cost. Completely interfaced for TTL. Low profile. Fits standard 8 pins DIP socket. Specifications: ■ ■ ■ ■ ■ ■ ■ ■ ■ Delay tolerance: see table.

SDA3010

Abstract: 2716 EPROM 3403AC
Contextual Info: Application-Oriented Single-Chip Microcomputer SDA3010 MOS IC Type Ordering code Package SDA 3010 Q 67120-C 86 Piggyback 40/24 pins SDA 3010 SDA 2010 - ROM-less Features • 8-bit CPU, RAM, I/O in piggyback package with 40/24 pins • Four analog outputs with 6 bit resolution

0331-015011827100

Abstract: 3603-0-07-21-00-00-08-0
Contextual Info: 460-2012:QuarkCatalogTempNew 8/22/12 5:00 PM Page 460 ENCLOSURES A/V, TEST CONNECTORS & IC SOCKETS TEST & MEASUREMENT 2 Pin Receptacles and PC Pins Pin Receptacles PC Solder Mount C B Stock No. Mfr.’s Type 70206477 70206478 70206367 70206479 70206480 70206481

Contextual Info: EFasf L og ic data\</3\\ Programmable Delay Lines delayW devicesYinc. 3 BIT T L Interfaced SERIES: PDU-13F Features: • Digitally program m able in 8 delay steps. ■ Fits standard 14 pins DIP socket. ■ Input & outputs fully T T L interfaced & buffered.

MDU-28F

Abstract: F125
Contextual Info: IF a s t L o g ic Multiple Digital SERIES: MDU-28F MnlloQE _ , „ . a Delay Dnits • P * DIP T I L Interfaced Features: • ■ ■ ■ ■ ■ Auto-insertable. Low cost. Completely interfaced for TTL. Low profile. Fits standard 8 pins DIP socket.

Contextual Info: L O G IC D E V IC E S IN C 2bE D • S S tS ^ O S Q Four 8-bit Registers □ Implements Double 2-Stage Pipe­ line or Single 4-Stage Pipeline Register Q Hold, Shift, Load Instructions □ Separate Data In and Data Out Pins Q High Speed, Low Power CMOS Technology

LD3320

Contextual Info: L O G IC D E V IC E S IN C 2bE D • S S tS ^ O S Q Four 8-bit Registers □ Implements Double 2-Stage Pipe­ line or Single 4-Stage Pipeline Register Q Hold, Shift, Load Instructions □ Separate Data In and Data Out Pins Q High Speed, Low Power CMOS Technology

Contextual Info: 7a s t Log ic Programmable Delay Lines SERIES: PDU-13F devicesYinc. 3 BIT T2L Interfaced 7 6 6 4 3 2 1 Lead Materia): NicRef-iron alloy 42 TIN PLATE Features: • ■ ■ ■ ■ ■ ■ Digitally program m able in 8 delay steps. Fits standard 14 pins DIP socket.

Contextual Info: Ta s t L o g ic data \&& / delay \c devicesVinc. Programmable Delay Lines SERIES: PDU-13F 3 BIT) T2L Interfaced F e a tu re s : • ■ ■ ■ ■ ■ ■ Digitally program m able in 8 delay steps. Fits standard 14 pins DIP socket. Input & outputs fully TTL interfaced & buffered.

13F4C

Abstract: st schottky
Contextual Info: ra s f L o g ic Programmable Delay Lines SERIES: PDU-13F 3 BIT T 2L Interfaced F e a tu re s : • ■ ■ ■ ■ ■ ■ Digitally program m able in 8 delay steps. Fits standard 14 pins DIF* socket. Input & outputs fully TTL interfaced & buffered. Two (2) separate outputs; inverting & non-inverting.

Contextual Info: ADVANCE M IC R O N 1 M T5C512K8B2 512K X 8 SRAM SRAM 512Kx 8 SRAM FEATURES • High speed: 1 2,15, 20, 25 and 35ns • High-perform ance, low -pow er, CM OS double-m etal process • M ultiple center power and ground pins for improved noise imm unity • Single +5V ±10% pow er supply

PIC1655A

Abstract: PIC1656 PIC16655A pic1664b PIC1650A PIC1665 PIC1664 oms 1664 PiC-1655a
Contextual Info: jf Nl KA1 IN SIR l M IN I PIC1664 8 Bit Development Microcomputer FEA TU R ES • PIC microcomputer with ROM removed ■ Useful for engineering prototyping of P IC applications ■ PIC ROM address & data lines brought out to pins ■ HALT pin for single stepping or stopping program

Contextual Info: Programmable Delay Units f e w SERIES: PDU-138 f3LBl,Tt erfaCed d e V iC C S ^ In c F e a tu re s : • ■ ■ ■ ■ ■ ■ ■ Digitally program m able in 8 delay steps. D elay in c re m e n ts o f V i N S thru 5 0 NS. Fits standard 16 pins DIP socket.

2716 eprom

Abstract: SDA3010 eprom 2716 67120 SDA 2010 SDA2030 A7228 AR10 3010 MOS sab 2716 eprom
Contextual Info: Application-Oriented Single-Chip Microcomputer SDA 3010 M OS IC Type O rdering code Package SDA 3010 Q 67120-C 86 Piggyback 40/24 pins SD A 3010 SDA 2010 - ROM-less Features • 8 -bit CPU, RAM, I/O • Four analog outputs with 6 bit resolution • 30 digital I/O lines

IDT29FCT520

Contextual Info: L29C520/521 □ FV IC E S IN C O R P Q R A T F D DESCRIPTION FEATURES □ Four 8-bit Registers □ Im plem ents Double 2-Stage Pip e­ line or Single 4-Stage Pipeline Register □ H old, Shift, and Load Instructions □ Separate D ata In and Data O ut Pins

Contextual Info: L10C11 D E V IC E S IN C O R P O R A T E D FEATURES q Variable Length 4 or 8-bit Wide Shift Register q Selectable Delay Length from 3 to 18 Stages q Low Power CMOS Technology q Replaces Fairchild TMC2011 q Load, Shift, and Hold Instructions q Separate Data In and Data O ut Pins

smd code Yj 18

Contextual Info: L29C525 Dual Pipeline Register D E V IC E S IN C O R P O R A T E D FEATURES □ □ □ □ □ □ □ □ □ Dual 8-Deep Pipeline Register Configurable to Single 16-Deep Low Power CMOS Technology Replaces AMD Am29525 Load, Shift, and Hold Instructions Separate Data In and Data Out Pins

Contextual Info: L10C11 □ FV IC E S IN C O R P Q R A T F D FEATURES q Variable Length 4 or 8-bit Wide Shift Register q Selectable Delay Length from 3 to 18 Stages q Low Power CMOS Technology q Replaces Fairchild TMC2011 q Load, Shift, and Hold Instructions q Separate Data In and Data Out Pins

smd dual diode code A7

Contextual Info: L29C525 Dual Pipeline Register DEV IC ES IN C O R PO R A TE D FEATURES □ □ □ □ □ □ □ □ □ D ual 8-Deep Pipeline Register C onfigurable to Single 16-Deep Low Pow er CMOS Technology Replaces AMD Am29525 Load, Shift, an d H old Instructions Separate D ata In and D ata O ut Pins

Contextual Info: L29C520/521 D E V IC E S IN C O R P O R A T E D DESCRIPTION FEATURES □ Four 8-bit Registers □ Im plem ents Double 2-Stage Pip e­ line or Single 4-Stage Pipeline Register □ H old, Shift, and Load Instructions □ Separate D ata In and Data O ut Pins

MDU-38F

Abstract: 38F3 MDU-38F-10 MDU-38F-40
Contextual Info: ìF a s t L o g ic Multiple Digital S ER IES ; MDU-38F Delay Units 8 pins DIP T T L Interfaced data delay devices; me. Features: • A uto-in sertable. ■ C o m p le te ly in terfaced for T T L & DTL ap p licatio n . ■ P.C. board space econom y achieved.