82S200
Abstract: 82S100 RESISTOR variable 82S201 signetics 82s100
Contextual Info: B2S2A0 T.S.Ì/82S201 ¿P.C. 82S200-I.N • 82S201-I.N DESCRIPTION The 82S200 (tri-state outputs) and the 82S201 (open c o lle c to r outputs) are B ip o la r P rogram m able Lo gic A rrays, c o n ta in in g 48 p ro d u c t term s (AND terms), and 8 sum term s
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82S200
/82S201
82S200-I
82S201-I
82S201
16-input
82S200
82S201
82S100
RESISTOR variable
signetics 82s100
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82s100
Abstract: 82S200
Contextual Info: APPLICATIONS* • • • • • • • • • • • • • The 82S200 and 82S201 are fu lly TTL com patible, and include chip enable control for expansion of input variables, and output inhibit. They feature either open collector or tri-state outputs for ease of expansion of
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82S200
82S201
16input
82S200
82S201
82S100-I
82S101-I
82s100
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2650B
Abstract: wf vqc 10d alu 9308 d Signetics 2650 SN52723 2650 cpu 82S103 pipbug Signetics NE561 cd 75232
Contextual Info: flcnCTICf ßii>ouiR/mos fflICROPROCEÍSOR DATfl mnnuni SIGNETICS reserves the right to make changes in the products contained in this book in order to improve design or performance and to supply the best possible products. Signetics also assumes no responsibility for the
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N82S201N
Abstract: N82S200N 82S201
Contextual Info: Signetics Memories - Bipolar PLA N82S200/82S201 Eiipolar Mask Programmable Logic C O N N E C T IO N D IA G R A M G E N E R A L D E S C R IP T IO N T h e 8 2 S 2 0 0 tri-s ta te o u tp u ts and th e 8 2S 2 01 (o p e n c o lle c to r o u tp u ts ) are B ip o la r P ro g ra m m a b le L o g ic A rra y s ,
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N82S200/N82S201
82S200
82S201
16-input
82S200
82S201
N82S201N
N82S200N
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