82C PCI ISA Search Results

82C556M

Abstract: OCH168 82C557M 82C558 OPTi 82C546 82c556 CI VIPER 17H 82C558M opti 82c556 IBM motherboard schematics
Contextual Info: twain 82C556M/82C557M/82C558M Viper-M Multimedia Chipset Preliminary Data Book Revision: 1.0 912-2000-010 April 1995 • RODm ^b □ Powered by ICminer.com Electronic-Library Service CopyRight 2003 038 Copyright Copyright 1995, OPTi Inc. All rights reserved. No part of this publication may be reproduced, transmitted, transcribed, stored

692CU

Abstract: 82c pci isa
Contextual Info: PRELIMINARY CY82C692 Pentium hyperCache™ Chipset Data-Path Controller with Integrated Cache Features • O n -C h ip 8-D ee p F IF O s s u p p o rt P o st-W ritin g /P re-R e ad ing PCI data • S u p p o rts all 3.3 V P e n tiu m ™ -c la s s p ro ces so rs , A M D

vt82c587vp

Abstract: VT82C585VPX VT82C586 Apollo VPX T82C587VP Apollo VP APOLLO vt82c580 vpx VT82C586B ACC Microelectronics notebook 82c pci isa
Contextual Info: , VT82C580VPX VIA Technologies Inc. VIA VT82C580 A p o l l o VPX L o w -C o s t P e n t iu m / PCI N o r t h B r id g e WITH 66/75MHZ CPU SUPPORT AND SDRAM / EDO / FPG INTERFACE f o r G r e e n PC D e s k t o p C o m p u t e r s • Flexible CPU Interface

83C206

Abstract: cyrix 486 82C596 82c pci isa 82c599
Contextual Info: p yXpX : v « *1 CY82C599 - Intelligent PCI Bus Controller Features Provides an interface between the PCI Local Bus and the CPU bus PCI Bus Rev. 2.0 compliant Supports Intel 486DX, 486DX2, 486SX, 486SL, P24T, AMD AM486 and Cyrix Cx486S2 M6/M7 CPUs Interfaces with Cypress CY82C596 or CY82C297 Core

82C55AC

Abstract: C82C55A 82CSSA M62C M62C55A-5 m82c55a-5 I82C55A I82C55A-5 m82c55a 55FB
Contextual Info: J D H A R R I S CMOS Programmable Peripheral Interface Features • • • • • • • • • • Pinouts * Pin C om patible with N M O S 8255A 24 Program m able I/O Pins Fully TTL Com patible High Speed, N o “W ait State” Operation w ith 5M H z and 8M H z 80C 86/80C 88

Contextual Info: SAB 82C55A-2 CMOS Programmable Peripheral Interface • • C o m p a tib le w ith a ll S ie m e n s and m o s t o th e r • C o m p le te ly T T L -c o m p a tib le m ic ro p ro c e s s o rs • C o n tro l w o rd re a d -b a ck c a p a b ility D ire c t b it-s e t/re s e t c a p a b ility

Contextual Info: FireLink 82C861 PCI-to-USB Bridge Data Book Revision: 1.0 912-3000-049 May 27, 1998 Copyright C opyright 1997, OPTi Inc. All rights reserved. No part of this publication may be reproduced, transmitted, tran­ scribed, stored in a retrieval system, or translated into any language or computer language, in any form or by any

2563 lcd

Abstract: 82C28
Contextual Info: Omega 82C 12& / Trident Product Brief Scalable ZV Serial IRQ/PWR Features Scalable ZV Port Solution Interrupt and Power Control • Companion chip to Omega 82C194 CardBus host controller to allow dual-socket ZV port input to LCD graphics controllers • • Tri-state control on ZV port buffers to allow other

Contextual Info: CYPRESS PRELIMINARY CY82C691 Pentium hyperCache™ Chipset System Controller Features Provides control for the cache, system memory, and the PCI bus PCI Bus Rev. 2.1 compliant Supports 3V Pentium™ , AMD K5, and Cyrix 6x86 M1 CPUs Support for WB or W T L1 cache

microprocessor pentium internal architecture intel

Abstract: RB80526PY700256 RB80526PY850256 RB80526PY600256 RB80526PZ733256 RK80530KZ012512 FC-PGA 370 815E PGA370 RB80526PZ001256
Contextual Info: product brief Pentium III Processors for Applied Computing Pentium® III Processor with 512K Cache Product Highlights • Available in 1.26 GHz for a 133 MHz processor side bus ■ Validated with Intel® 815E Chipset and Chipsets from third-party-vendors

82C55A-2

Abstract: 82c55a2
Contextual Info: SAB 82C55A-2 CMOS Programmable Peripheral Interface C o m p a tib le w ith all S ie m e n s a nd m o s t o th e r m ic ro p ro c e s s o rs • C o m p le te ly T T L -c o m p a tib le • C o n tro l w o rd re ad -b a ck c a p a b ility H ig h -spe e d "z e ro w a it s ta te " o p e ra tio n w ith

Contextual Info: PRELIM INARY CY82C692 Pentium hyperCache™ Chipset Data-Path Controller with Integrated Cache Features • Supports ail 3.3V Pentium™-class processors, AMD K5, K6 and Cyrix M1 CPUs • Two-bit wraparound counter supporting Intel Burst or Linear burst sequence

F1828

Contextual Info: H A R R I S S E M I C O N D S E C T O R M A R F IIS I b E B 2 D C • 4 3 D 2 E 7 1 5 5 A / 1 8 T 4 8 - m 3 Features Description • This C ircuft is Processed in Accordance to M il-S td 883 and is fu lly C onform ant Under th e Provisions o f Paragraph 1.2.1

82C861

Abstract: h12H opti 82c861 82c871 82c pci isa 105H1
Contextual Info: Preliminary 82C861/82C871 FireLink/FireBlast PCI-to-USB Bus Bridges 1.0 Features Features of FireLink • Supports both one-wire and two-wire serial IRQ option • Pin compatibility with the CMD USB0670 PCI-USB Con­ troller • Offers push-button volume control

OPTI

Abstract: 82C814 82c pci isa
Contextual Info: FireBridge II 82C814 Docking Station Controller Data Book R evision: 1.0 912-3000-047 January 08, 1998 Copyright 1997, OPTi Inc. All rights reserved. No part of this publication may be reproduced, transmitted, transcribed, stored in a retrieval system, or translated into any language or computer language, in any form or by any means, electronic, mechani­

8kx1 RAM

Abstract: 82c pci isa tagram
Contextual Info: Pentium hyperCache™ Chipset System Controller Featu res Supports mixed standard page-mode and EDO DRAMs Supports the VESA Unified Memory Architecture VUMA Support fo r standard 72-bit-wide DRAM banks • Provides control fo rth e cache, system memory, and the

82c693 chipset

Abstract: SFF-8038i
Contextual Info: CY82C693 Pentium hyperCache™ Chipset Peripheral Controller — CD ROM support Featu res • PCI to ISA bridge • PCI Bus Rev. 2.1 compliant • Supports up to 5 additional PCI masters including the CY82C691 • Integrated DMA controllers with Type A, B, and F sup­

Y2254A

Abstract: 2254a 82c pci isa SFF-8038i
Contextual Info: y?Çj PRELIMINARY _CY82C693UB hyperCache / Stand-Alone PCI Peripheral Controller with USB — CD ROM support Features — PIO modes 0 through 4 operation • PCI to ISA bridge • PCI Bus Rev. 2.1 compliant • Supports up to 5 additional PCI masters including the

1MD45

Abstract: cy17 High-Zt11-12 CY10 CY82C691 CY82C692 CY82C693 DQ23P cy82
Contextual Info: PRELIM INARY CY82C692 W CYPRESS Pentium hyperCache™ Chipset Data-Path Controller with Integrated Cache Features • Supports ail 3.3V Pentium™-class processors, AMD K5, K6 and Cyrix M1 CPUs • Two-bit wraparound counter supporting Intel Burst or Linear burst sequence

Contextual Info: PRELIM INARY CY82C691 Pentium hyperCache™ Chipset System Controller Features • Provides control for the cache, system memory, and the PCI bus • PCI Bus Rev. 2.1 compliant • Supports 3V Pentium™, AMD K5, K6, and Cyrix 6x86 M1 CPUs • Support for WB or WT L1 cache

82378

Contextual Info: Â P M ê l ÖMF@ 08[M]ÄirD@KI in t e l 82378 SYSTEM I/O SIO • Provides the Bridge Between the PCI Bus and ISA Bus ■ 100% PCI and ISA Compatible — PCI and ISA Master/Slave Interface — Directly Drives 10 PCI Loads and 6 ISA Slots — Supports PCI at 25 MHz and 33 MHz

Contextual Info: ^^B S S S m PRELIMINARY '* CY82C597 C Y PR E SS 386/486 G reen C hipset Features • 160-Pin single chip PQFP • Supports PC/AT compatible systems at 25/33/40/50 MHz • Supports AMD, Cyrix level 1 write­ back CPU • Write-Back/Write-Through cache with

CYL7

Abstract: Cyrix 6x86 MX CPU 82c691
Contextual Info: PRELIMINARY CY82C691 Pentium hyperCache™ Chipset System Controller •Provides power management support through SMM APM Compliant •Integrated 8Kx21 tag (direct mapped or two-way set associative) •Support for cache sizes up to 1 MB •Supports mixed standard page-mode

1de2

Abstract: northbridge circuit pentium 4 PS/2 KEYBOARD CONTROLLER 001H CY82C691 CY82C693UB intel 8042 keyboard controller 000B0000
Contextual Info: CY82C693UB P R E LIM IN A R Y hyperCache / Stand-Alone PCI Peripheral Controller with USB — CD ROM support Features PCI to ISA bridge PCI Bus Rev. 2.1 compliant Supports up to 5 additional PCI masters including the CY82C691 Integrated DMA controllers with Type A, B, and F sup­