900MB Search Results

g14a

Abstract: PV10
Contextual Info: 活塞式 真空 压力开关 触点输出 PV10系列 紧凑型 设定范围：-200mbar…-900mbar 原理，结构：内置活塞与精密弹簧相连当压力变化时，弹簧特性发生相应变化，当压 力达到设定值时，会触发预设的机械结构并发出开关信号。

Contextual Info: 1/4 STRUCTURE Silicon Monolithic Integrated Circuit PRODUCTNAME BU7962GUW FUNCTION Serial Interface for Mobile Devices Application MSDL3 Mobile Shrink Data Link 3 Deserializer LSI FEATURES •Maximum transmission rate of highspeed differential interface MSDL3 is 900Mbps.

G18 k

Contextual Info: 活塞式 真空 压力开关 触点输出 PV11系列 设定范围：-200mbar…-500mbar/-500mbar…-900mbar 紧凑型 原理，结构：内置活塞与精密弹簧相连当压力变化时，弹簧特性发生相应变化，当压 力达到设定值时，会触发预设的机械结构并发出开关信号。

PD10

Abstract: fxs interface integrated circuit BU7962
Contextual Info: 1/4 STRUCTURE Silicon Monolithic Integrated Circuit PRODUCTNAME BU7962GUW FUNCTION Serial Interface for Mobile Devices Application MSDL3 Mobile Shrink Data Link 3 Deserializer LSI FEATURES •Maximum transmission rate of highspeed differential interface MSDL3 is 900Mbps.

Contextual Info: 1/4 STRUCTURE Silicon Monolithic Integrated Circuit PRODUCTNAME BU7961GUW FUNCTION Serial Interface for Mobile Devices Application MSDL3 Mobile Shrink Data Link 3 Serializer LSI FEATURES •Maximum transmission rate of highspeed differential interface MSDL3 is 900Mbps.

BU7961

Abstract: PD10
Contextual Info: 1/4 STRUCTURE Silicon Monolithic Integrated Circuit PRODUCTNAME BU7961GUW FUNCTION Serial Interface for Mobile Devices Application MSDL3 Mobile Shrink Data Link 3 Serializer LSI FEATURES •Maximum transmission rate of highspeed differential interface MSDL3 is 900Mbps.

Contextual Info: Series 900MB Modbus RTU I/O Model 900C-SIP Configuration Software Interface Package Configuration Software ◆ USB-to-RS232 Adapter ◆ RS232-to-RS485 Adapter ◆ Interface Cable Description Ordering Information Connection Diagram Acromag’s configuration software is the key

LVDS to MIPI CSI

Abstract: LVDS to mipi bridge MIPI csi-2 mipi csi-2 receiver mipi csi receiver MIPI D-PHY mipi csi-2 transmitter MIPI csi bridge 400x240 MIPI csi-2 receivers
Contextual Info: DS90UR910Q 10 - 75 MHz 24-bit Color FPD-Link II to CSI-2 Converter General Description Features The DS90UR910Q is an interface bridge chip that recovers data from the FPD-Link II serial bit stream and converts into a Camera Serial Interface CSI-2 format compatible with Mobile Industry Processor Interface (MIPI) specifications. It recovers the 24- or 18-bit RGB data and 3 video sync-signals

SFF8088

Abstract: LSISAS1068 LSISAS3801X AMD64 ICES-003
Contextual Info: Product Brief LSISAS3801X 3Gb/s miniSAS Eight-Port Host Bus Adapter Providing Maximum Throughput for External Storage Arrays, in a Low-Profile Adapter K e y A dva n tag e s n Flexible SAS/SATA array architecture optimizes cost n Eight external high-speed SAS ports

LSI00100

Abstract: SFF8484 SFF8470 SFF-8484 LSISAS1068 LSISAS3442X-R canada ices 003 AMD64 ICES-003
Contextual Info: Product Brief LSISAS3442X-R 3G/s SAS Eight-Port Host Bus Adapter with Integrated RAID Providing Full-Duplex High-Performance Connectivity for Internal and External Storage Arrays K e y A dva n tag e s n n A p p l i c at i o n s n High performance workstations

k4n26323ae

Abstract: K4N26 K4N26323AE-GC20 K4N26323AE-GC22 K4N26323AE-GC25
Contextual Info: 128M GDDR2 SDRAM K4N26323AE-GC 128Mbit GDDR2 SDRAM 1M x 32Bit x 4 Banks GDDR2 SDRAM with Differential Data Strobe and DLL Revision 1.7 January 2003 Samsung Electronics reserves the right to change products or specification without notice. - 1 - Rev. 1.7 Jan. 2003

digital clock object counter project report

Abstract: gal programming algorithm vantis jtag schematic new ieee programs in vhdl and verilog bidirectional shift register vhdl IEEE format 900MB Signal Path Designer
Contextual Info: ispDesignEXPERTt Development System for Windows TM • LEADING CAE VENDOR DESIGN TOOLS INCLUDED — Exemplar Logic LeonardoSpectrum® Verilog and VHDL Synthesis Engine — Synplicity® Synplify® Verilog and VHDL Synthesis Engine — Synthesis by Synopsys® Verilog and VHDL

gal programming algorithm

Abstract: GAL Development Tools orcad schematic symbols library digital clock object counter project report ABEL-HDL Reference Manual LATTICE 3000 SERIES cpld Signal Path Designer Turbo Decoder
Contextual Info: ispDesignEXPERTt Development System for Windows TM • LEADING CAE VENDOR DESIGN TOOLS INCLUDED — Exemplar Logic LeonardoSpectrum® Verilog and VHDL Synthesis Engine — Synplicity® Synplify® Verilog and VHDL Synthesis Engine — Synthesis by Synopsys® Verilog and VHDL

Contextual Info: 256M gDDR2 SDRAM K4N56163QG 256Mbit gDDR2 SDRAM Revision 1.1 April 2006 Notice INFORMATION IN THIS DOCUMENT IS PROVIDED IN RELATION TO SAMSUNG PRODUCTS, AND IS SUBJECT TO CHANGE WITHOUT NOTICE. NOTHING IN THIS DOCUMENT SHALL BE CONSTRUED AS GRANTING ANY LICENSE,

MIPI DSI to RGB

Abstract: hdmi mhl transmitter SiI9224 HDMI TO MIPI DSI Silicon Image MHL RGB TO MIPI DSI MHL receiver MIPI DSI IEC60958 MIPI datasheet
Contextual Info: Product Brief SiI9224 VastLane Mobile HD Link Transmitter Applications Low pin-count, HDMI interoperable HD video solution for mobile phones, digital still cameras, portable media players & camcorders • Mobile Phones The Silicon Image SiI9224 is an ultra low-power Mobile HD Link™ MHL™ transmitter

SiI9224

Abstract: MIPI DSI LCD RGB to MIPI DSI LCD MIPI DSI to RGB MIPI CPI HDMI to vga converter block diagram mipi dvi converter HDMI input MIPI DSI output RGB TO MIPI DSI HDMI TO MIPI DSI
Contextual Info: Product Brief SiI9224 VastLane Mobile HD Link Transmitter Applications Low pin-count, HDMI interoperable HD video solution for mobile phones, digital still cameras, portable media players & camcorders • Mobile Phones The Silicon Image SiI9224 is an ultra low-power Mobile HD Link™ MHL™ transmitter

gddr5

Abstract: K4N51163QC-ZC K4N51163QC-ZC25 K4N51163QC-ZC2A K4N51163QC-ZC33 K4N51163QC-ZC36
Contextual Info: 512M gDDR2 SDRAM K4N51163QC-ZC 512Mbit gDDR2 SDRAM Revision 1.5 October 2005 Notice INFORMATION IN THIS DOCUMENT IS PROVIDED IN RELATION TO SAMSUNG PRODUCTS, AND IS SUBJECT TO CHANGE WITHOUT NOTICE. NOTHING IN THIS DOCUMENT SHALL BE CONSTRUED AS GRANTING ANY LICENSE,

Contextual Info: HY5DW573222F P 256M(8Mx32) GDDR SDRAM HY5DW573222F(P) This document is a general product description and is subject to change without notice. Hynix Electronics does not assume any responsibility for use of circuits described. No patent licenses are implied.

K4N56163QI-ZC25

Contextual Info: 256M gDDR2 SDRAM K4N56163QI 256Mbit gDDR2 SDRAM Revision 1.1 May 2007 Notice INFORMATION IN THIS DOCUMENT IS PROVIDED IN RELATION TO SAMSUNG PRODUCTS, AND IS SUBJECT TO CHANGE WITHOUT NOTICE. NOTHING IN THIS DOCUMENT SHALL BE CONSTRUED AS GRANTING ANY LICENSE,

HY5PS121621BFP

Abstract: HY5PS121621B HY5PS121621BFP-2
Contextual Info: HY5PS121621BFP 512Mb 32Mx16 gDDR2 SDRAM HY5PS121621BFP This document is a general product description and is subject to change without notice. Hynix Semiconductor does not assume any responsibility for use of circuits described. No patent licenses are implied.

Contextual Info: HY5RS573225F 256M 8Mx32 GDDR3 SDRAM HY5RS573225F This document is a general product description and is subject to change without notice. Hynix Electronics does not assume any responsibility for use of circuits described. No patent licenses are implied. Rev. 0.6 / Oct. 2004

Contextual Info: HY5PS121621BFP 512Mb 32Mx16 DDR2 SDRAM HY5PS121621BFP This document is a general product description and is subject to change without notice. Hynix Semiconductor does not assume any responsibility for use of circuits described. No patent licenses are implied.

Contextual Info: HY5PS121621BFP 512Mb 32Mx16 gDDR2 SDRAM HY5PS121621BFP This document is a general product description and is subject to change without notice. Hynix Semiconductor does not assume any responsibility for use of circuits described. No patent licenses are implied.

HY5PS561621AFP-33

Contextual Info: HY5PS561621AF P 256Mb(16Mx16) gDDR2 SDRAM HY5PS561621AF(P) This document is a general product description and is subject to change without notice. Hynix Semiconductor does not assume any responsibility for use of circuits described. No patent licenses are implied.