ABT377 Search Results

175C

Abstract: 54ABT377 54ABT377E-QML 54ABT377J-QML 54ABT377W-QML 5962-9314801Q2A
Contextual Info: MICROCIRCUIT DATA SHEET Original Creation Date: 10/05/95 Last Update Date: 10/05/98 Last Major Revision Date: 03/19/97 ABT377-X REV 0B0 OCTAL D-TYPE FLIP-FLOP WITH CLOCK ENABLE General Description The ABT377 has eight edge-triggered D-type flip-flops with individual D inputs and Q

74ABT377

Abstract: 74ABT377CMSA 74ABT377CMTC 74ABT377CSC 74ABT377CSJ ABT273 ABT373
Contextual Info: Revised November 1998 ABT377 Octal D-Type Flip-Flop with Clock Enable General Description Features The ABT377 has eight edge-triggered, D-type flip-flops with individual D inputs and Q outputs. The common buffered Clock CP input loads all flip-flops simultaneously

74ABT377

Abstract: 74ABT377CMSA 74ABT377CSC 74ABT377CSJ ABT273 ABT373 M20D MS-013
Contextual Info: S E M IC O N D U C T O R Revised N ovem ber 1998 TM ABT377 Octal D-Type Flip-Flop with Clock Enable General Description Features T he ABT377 has eight edge-triggered, D -type flip-flops w ith individual D inputs and Q outputs. The com m on buff­ ered Clock CP input loads all flip-flops sim ultaneously

Contextual Info: s e m ic o n d u c t o r Revised November 1999 ABT377 Octal D-Type Flip-Flop with Clock Enable General Description Features The ABT377 has eight edge-triggered, D-type flip-flops with individual D inputs and Q outputs. The common buff­ ered Clock CP input loads all flip-flops simultaneously

74ABT377

Abstract: 74ABT377CMSA 74ABT377CMTC 74ABT377CSC 74ABT377CSJ ABT273 ABT373
Contextual Info: Revised November 1999 ABT377 Octal D-Type Flip-Flop with Clock Enable General Description Features The ABT377 has eight edge-triggered, D-type flip-flops with individual D inputs and Q outputs. The common buffered Clock CP input loads all flip-flops simultaneously

Contextual Info: ABT377, ABT377A OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLOCK ENABLE SCBS156E – FEBRUARY 1991 – REVISED JANUARY 1997 D D D D ABT377 . . . J OR W PACKAGE ABT377A . . . DB, DW, N, OR PW PACKAGE TOP VIEW CLKEN 1Q 1D 2D 2Q 3Q 3D 4D 4Q

74ABT273

Abstract: 74ABT273CMSA 74ABT273CMTC 74ABT273CSC 74ABT273CSJ ABT273 ABT373
Contextual Info: Revised November 1998 74ABT273 Octal D-Type Flip-Flop General Description Features The ABT273 has eight edge-triggered D-type flip-flops with individual D inputs and Q outputs. The common buffered Clock CP and Master Reset (MR) inputs load and reset (clear) all flip-flops simultaneously.

ABT273

Abstract: 64 CERAMIC LEADLESS CHIP CARRIER LCC SMD B100 74ABT273 74ABT273CSC 74ABT273CSJ ABT373 M20D
Contextual Info: 54ABT 74ABT273 Octal D-Type Flip-Flop General Description Features The ’ABT273 has eight edge-triggered D-type flip-flops with individual D inputs and Q outputs The common buffered Clock CP and Master Reset (MR) inputs load and reset (clear) all flip-flops simultaneously

5962-9314801Q2A

Abstract: 5962-9314801QRA 5962-9314801QSA SN54ABT377 SN74ABT377
Contextual Info: ABT377, ABT377 OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLOCK ENABLE SCBS156B – FEBRUARY 1991 – REVISED JULY 1994 • • • • State-of-the-Art EPIC-ΙΙB  BiCMOS Design Significantly Reduces Power Dissipation Latch-Up Performance Exceeds 500 mA

74ABT273

Abstract: 74ABT273CMSA 74ABT273CMTC 74ABT273CMTCX 74ABT273CSC 74ABT273CSJ ABT273 ABT373
Contextual Info: Revised March 2005 74ABT273 Octal D-Type Flip-Flop General Description Features The ABT273 has eight edge-triggered D-type flip-flops with individual D inputs and Q outputs. The common buffered Clock CP and Master Reset (MR) inputs load and reset (clear) all flip-flops simultaneously.

MIL-STD-833B

Abstract: 54ABT273 54ABT273E-QML 54ABT273J-QML 54ABT273W-QML ABT273 ABT373 J20A W20A
Contextual Info: 54ABT273 Octal D-Type Flip-Flop General Description The ’ABT273 has eight edge-triggered D-type flip-flops with individual D inputs and Q outputs. The common buffered Clock CP and Master Reset (MR) inputs load and reset (clear) all flip-flops simultaneously.

Contextual Info: ABT377, ABT377 OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLOCK ENABLE SCBS156B – FEBRUARY 1991 – REVISED JULY 1994 • • • • State-of-the-Art EPIC-ΙΙB  BiCMOS Design Significantly Reduces Power Dissipation Latch-Up Performance Exceeds 500 mA

74ABT377

Abstract: 74ABT377CMSA 74ABT377CMTC 74ABT377CSC 74ABT377CSJ ABT273 ABT373 74ABT
Contextual Info: ABT377 Octal D-Type Flip-Flop with Clock Enable Y General Description Y The ’ABT377 has eight edge-triggered D-type flip-flops with individual D inputs and Q outputs The common buffered Clock CP input loads all flip-flops simultaneously when the Clock Enable (CE) is LOW

Contextual Info: s e m ic o n d u c t o r Revised November 1999 74ABT273 Octal D-Type Flip-Flop General Description Features The ABT273 has eight edge-triggered D-type flip-flops with individual D inputs and Q outputs. The common buffered Clock CP and Master Reset (MR) inputs load and reset

Contextual Info: 54ABT273 54ABT273 Octal D-Type Flip-Flop Literature Number: SNOS043 54ABT273 Octal D-Type Flip-Flop General Description The ’ABT273 has eight edge-triggered D-type flip-flops with individual D inputs and Q outputs. The common buffered Clock CP and Master Reset (MR) inputs load and reset

SN54ABT377

Abstract: SN74ABT377
Contextual Info: ABT377, ABT377 OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLOCK ENABLE SCBS166B - FEBRUARY 1991 - REVISED JULY 1994 ABT377. . . J PACKAGE ABT377. . . OB, DW, OR N PACKAGE TOP VIEW State-of-the-Art EPIC-llB BiCMOS Design Significantly Reduces Power Dissipation

DQ2060

Abstract: DC1065 EB285 EBSA-285 R164 SA110 B20B20 A59A59 CPU-A13 CPUD22
Contextual Info: A B C D COPYRIGHT C 8 1997 DIGITAL EQUIPMENT CORPORATION 8 16 17 18 19 20 21 sht sht sht sht sht sht 7 CHK CHANGE NO. REV CPU, CPU_, a Block Address X-Bus XBUF_, have PCI +3V Stand - +2V, - - - TAG_,RST_ - - 6 bidirects this 5 is Debug Port their Serial Spare

Contextual Info: Semiconductor September 1995 ABT377 Octal D-Type Flip-Flop with Clock Enable General Description The ’ABT377 has eight edge-triggered, D-type flip-flops with individual D inputs and Q outputs. The common buffered Clock CP input loads all flip-flops simultaneously, when the

Contextual Info: ABT377, ABT377 OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLOCK ENABLE SCBS156B – FEBRUARY 1991 – REVISED JULY 1994 • • • • State-of-the-Art EPIC-ΙΙB  BiCMOS Design Significantly Reduces Power Dissipation Latch-Up Performance Exceeds 500 mA

54ABT377

Abstract: 54ABT377E-QML 54ABT377J-QML 54ABT377W-QML ABT273 ABT373 J20A W20A
Contextual Info: ABT377 Octal D-Type Flip-Flop with Clock Enable General Description The ’ABT377 has eight edge-triggered, D-type flip-flops with individual D inputs and Q outputs. The common buffered Clock CP input loads all flip-flops simultaneously, when the Clock Enable (CE) is LOW.

Contextual Info: 377C gn National Semiconductor 54ABT/ABT377C Octal D-Type Flip-Flop with Clock Enable General Description The ’ABT377C has eight edge-triggered, D-type flip-flops with individual D inputs and Q outputs. The common buff­ ered Clock CP input loads all flip-flops simultaneously,

Contextual Info: co s &N a t i o n a l Semiconductor ABT377 Octal D-Type Flip-Flop with Clock Enable General Description The ’ABT377 has eight edge-triggered, D-type flip-flops with individual D inputs and Q outputs. The common buffered Clock CP input loads all flip-flops simultaneously, when the

Contextual Info: ABT377, ABT377 OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLOCK ENABLE SCBS156B – FEBRUARY 1991 – REVISED JULY 1994 • • • • State-of-the-Art EPIC-ΙΙB  BiCMOS Design Significantly Reduces Power Dissipation Latch-Up Performance Exceeds 500 mA

abt244a

Abstract: ABT573A ABT543A 74ABT244a Ablebond 71-1 ABT240A ABT574A SN74ABT573 abt374a SN74ABT241
Contextual Info: TEXAS INSTRUMENTS Qualification Notification of Device Revisions for Selected ABT Octals April 11, 1996 Abstract Texas Instruments has qualified device revisions for eleven Octal devices in the ABT Family. These devices were redesigned in order to incorporate improved ESD protection circuitry. Revision to