CD54ACT109 Search Results

CD54ACT109

Abstract: CD54ACT109F3A CD74ACT109 CD74ACT109E CD74ACT109M CD74ACT109M96
Contextual Info: CD54ACT109, CD74ACT109 DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET SCHS327 – JANUARY 2003 D D D D D D CD54ACT109 . . . F PACKAGE CD74ACT109 . . . E OR M PACKAGE TOP VIEW Inputs Are TTL-Voltage Compatible Speed of Bipolar F, AS, and S, With

IC 544-S

Contextual Info: L 4302271 0Q2bl70 b H i HAS 37E _ HARRIS semicond sector High-Reliability Advanced CMOS Logic ICs '-“F U k '0 7 -0 7 Recent Additions CD54AC109/3A CD54ACT109/3A SW IT C H IN G C H A R A C T E R IS T IC S : A C Series; tr, t, = 3 ns, C L = 50 pF Worst Case

CD54ACT109

Abstract: CD54ACT109F3A CD74ACT109 CD74ACT109E CD74ACT109M CD74ACT109M96
Contextual Info: CD54ACT109, CD74ACT109 DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET SCHS327 – JANUARY 2003 D D D D D D CD54ACT109 . . . F PACKAGE CD74ACT109 . . . E OR M PACKAGE TOP VIEW Inputs Are TTL-Voltage Compatible Speed of Bipolar F, AS, and S, With

Contextual Info: CD54ACT109, CD74ACT109 DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET SCHS327 – JANUARY 2003 D D D D D D CD54ACT109 . . . F PACKAGE CD74ACT109 . . . E OR M PACKAGE TOP VIEW Inputs Are TTL-Voltage Compatible Speed of Bipolar F, AS, and S, With

Contextual Info: CD54ACT109, CD74ACT109 DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET SCHS327 – JANUARY 2003 D D D D D D CD54ACT109 . . . F PACKAGE CD74ACT109 . . . E OR M PACKAGE TOP VIEW Inputs Are TTL-Voltage Compatible Speed of Bipolar F, AS, and S, With

Contextual Info: CD54ACT109, CD74ACT109 DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET SCHS327 – JANUARY 2003 D D D D D D CD54ACT109 . . . F PACKAGE CD74ACT109 . . . E OR M PACKAGE TOP VIEW Inputs Are TTL-Voltage Compatible Speed of Bipolar F, AS, and S, With

CD54ACT109

Abstract: CD54ACT109F3A CD74ACT109 CD74ACT109E CD74ACT109M CD74ACT109M96
Contextual Info: CD54ACT109, CD74ACT109 DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET SCHS327 – JANUARY 2003 D D D D D D CD54ACT109 . . . F PACKAGE CD74ACT109 . . . E OR M PACKAGE TOP VIEW Inputs Are TTL-Voltage Compatible Speed of Bipolar F, AS, and S, With

Contextual Info: 17E High-Reliability Advanced CMOS Logic IC s_ Recent Additions CD54AC109/3A CD54ACT109/3A D • 3075001 0024=177 0 G E S0LI1 STATE —i— i n 1 T 4b-ö7 •O / Dual “J-K” Flip-Flop with Set and Reset Positlve-Edge-Triggered J, K) The RCA CD54AC109 and CD54ACT109 are dual “J-K” flipflops with set and reset that utilize the new RCA ADVANCED

Contextual Info: CD54ACT109, CD74ACT109 DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET SCHS327 – JANUARY 2003 D D D D D D CD54ACT109 . . . F PACKAGE CD74ACT109 . . . E OR M PACKAGE TOP VIEW Inputs Are TTL-Voltage Compatible Speed of Bipolar F, AS, and S, With

Contextual Info: High-Reliability Advanced CMOS Logic ICs Recent Additions CD54AC109/3A CD54ACT109/3A SWITCHING CHARACTERISTICS: AC Series; t„ t, = 3 ns, CL = 50 pF Worst Case CHARACTERISTICS SYMBOL Propagation Delays: CP (CP) to Q, Q Vcc (V) 1.5 3.3* S, R to Q, Q tpHL

Contextual Info: CD54ACT109, CD74ACT109 DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET SCHS327 – JANUARY 2003 D D D D D D CD54ACT109 . . . F PACKAGE CD74ACT109 . . . E OR M PACKAGE TOP VIEW Inputs Are TTL-Voltage Compatible Speed of Bipolar F, AS, and S, With

Contextual Info: High-Reliability Advanced CMOS Logic ICs Recent Additions CD54AC109/3A CD54ACT109/3A Dual “J-K” Flip-Flop with Set and Reset Positive-Edge-Triggered J, K The RCA CD54AC109 and CD54ACT109 are dual “J-K ” flipflops w ith set and reset that utilize the new RCA ADVANCED

CD54AC112

Abstract: CD54ACT112
Contextual Info: High-Reliability Advanced CMOS Logic ICs Recent Additions CD54AC109/3A CD54ACT109/3A SWITCHING CHARACTERISTICS: AC Series; tr, t, = 3 ns, CL = 50 pF Worst Case SYMBOL CHARACTERISTICS Propagation Delays: CP (CP) to Q, U tp L H tp H L S, R to Q, Q tp H L Power Dissipation Capacitance

CD54ACT109

Abstract: CD54ACT109F3A CD74ACT109 CD74ACT109E CD74ACT109M CD74ACT109M96
Contextual Info: CD54ACT109, CD74ACT109 DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET SCHS327 – JANUARY 2003 D D D D D D CD54ACT109 . . . F PACKAGE CD74ACT109 . . . E OR M PACKAGE TOP VIEW Inputs Are TTL-Voltage Compatible Speed of Bipolar F, AS, and S, With

Contextual Info: CD54ACT109, CD74ACT109 DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET SCHS327 – JANUARY 2003 D D D D D D CD54ACT109 . . . F PACKAGE CD74ACT109 . . . E OR M PACKAGE TOP VIEW Inputs Are TTL-Voltage Compatible Speed of Bipolar F, AS, and S, With

Contextual Info: CD54ACT109, CD74ACT109 DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET SCHS327 – JANUARY 2003 D D D D D D CD54ACT109 . . . F PACKAGE CD74ACT109 . . . E OR M PACKAGE TOP VIEW Inputs Are TTL-Voltage Compatible Speed of Bipolar F, AS, and S, With

Contextual Info: CD54ACT109, CD74ACT109 DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET SCHS327 – JANUARY 2003 D D D D D D CD54ACT109 . . . F PACKAGE CD74ACT109 . . . E OR M PACKAGE TOP VIEW Inputs Are TTL-Voltage Compatible Speed of Bipolar F, AS, and S, With

Contextual Info: CD54ACT109, CD74ACT109 DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET SCHS327 – JANUARY 2003 D D D D D D CD54ACT109 . . . F PACKAGE CD74ACT109 . . . E OR M PACKAGE TOP VIEW Inputs Are TTL-Voltage Compatible Speed of Bipolar F, AS, and S, With

Contextual Info: CD54ACT109, CD74ACT109 DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET SCHS327 – JANUARY 2003 D D D D D D CD54ACT109 . . . F PACKAGE CD74ACT109 . . . E OR M PACKAGE TOP VIEW Inputs Are TTL-Voltage Compatible Speed of Bipolar F, AS, and S, With

Contextual Info: CD54ACT109, CD74ACT109 DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET SCHS327 – JANUARY 2003 D D D D D D CD54ACT109 . . . F PACKAGE CD74ACT109 . . . E OR M PACKAGE TOP VIEW Inputs Are TTL-Voltage Compatible Speed of Bipolar F, AS, and S, With

Contextual Info: CD54ACT109, CD74ACT109 DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET SCHS327 – JANUARY 2003 D D D D D D CD54ACT109 . . . F PACKAGE CD74ACT109 . . . E OR M PACKAGE TOP VIEW Inputs Are TTL-Voltage Compatible Speed of Bipolar F, AS, and S, With

Contextual Info: CD54ACT109, CD74ACT109 DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET SCHS327 – JANUARY 2003 D D D D D D CD54ACT109 . . . F PACKAGE CD74ACT109 . . . E OR M PACKAGE TOP VIEW Inputs Are TTL-Voltage Compatible Speed of Bipolar F, AS, and S, With

CD54AC109

Abstract: CD54AC112 CD54ACT109 CD54ACT112
Contextual Info: Hlgh-Rellablllly Advanced CMOS Logic IC s - E Z 5 - ^ _1 4 3 0 5 5 7 1 Recent Additions CD54AC109/3A CD54ACT109/3A QQgblbq T HHAS HARRIS SEI1IC0NI SECT0R —i— ' ¿ i t c f i " P ^ -0 -7 -0 7 Dual “J-K” Flip-Flop with Set and Reset Positive-Edge-Triggered J, K)

CD54ACT109

Abstract: CD54ACT109F3A CD74ACT109 CD74ACT109E CD74ACT109M CD74ACT109M96
Contextual Info: CD54ACT109, CD74ACT109 DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET SCHS327 – JANUARY 2003 D D D D D D CD54ACT109 . . . F PACKAGE CD74ACT109 . . . E OR M PACKAGE TOP VIEW Inputs Are TTL-Voltage Compatible Speed of Bipolar F, AS, and S, With