CD74AC10 |
|
Texas Instruments
|
Triple 3-Input NAND Gate |
|
Original |
PDF
|
28.55KB |
5 |
CD74AC109 |
|
Texas Instruments
|
DUAL J-K FLIP-FLOP WITH SET RESET |
|
Original |
PDF
|
230.07KB |
8 |
CD74AC109E |
|
Texas Instruments
|
CD74AC109 Dual Positive-edge-triggered J-k Flip-flops With Set and Reset |
|
Original |
PDF
|
225.97KB |
11 |
CD74AC109E |
|
Texas Instruments
|
Dual Positive-Edge-Triggered J-K Flip-Flops with Set and Reset 16-PDIP -55 to 125 |
|
Original |
PDF
|
657.5KB |
16 |
CD74AC109E |
|
Texas Instruments
|
Dual J-K Flip-Flop with Set and Reset |
|
Original |
PDF
|
230.07KB |
8 |
CD74AC109E |
|
Harris Semiconductor
|
Dual J-K Flip-Flop with Set and Reset |
|
Scan |
PDF
|
821.58KB |
10 |
CD74AC109E |
|
Unknown
|
Historical semiconductor price guide (US$ - 1998). From our catalog scanning project. |
|
Historical |
PDF
|
39.74KB |
1 |
CD74AC109EE4 |
|
Texas Instruments
|
Dual Positive-Edge-Triggered J-K Flip-Flops with Set and Reset |
|
Original |
PDF
|
364.23KB |
12 |
CD74AC109EE4 |
|
Texas Instruments
|
Dual Positive-Edge-Triggered J-K Flip-Flops with Set and Reset 16-PDIP -55 to 125 |
|
Original |
PDF
|
657.5KB |
16 |
CD74AC109EG4 |
|
Texas Instruments
|
Integrated Circuits (ICs) - Logic - Flip Flops - IC FF JK TYPE DUAL 1BIT 16DIP |
|
Original |
PDF
|
914.32KB |
|
CD74AC109M |
|
Texas Instruments
|
Dual J-K Flip-Flop with set ans Reset |
|
Original |
PDF
|
230.06KB |
8 |
CD74AC109M |
|
Texas Instruments
|
CD74AC109 - IC AC SERIES, DUAL POSITIVE EDGE TRIGGERED J-KBAR FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO16, PLASTIC, SOIC-16, FF/Latch |
|
Original |
PDF
|
925.84KB |
16 |
CD74AC109M |
|
Harris Semiconductor
|
Dual J-K Flip-Flop with Set and Reset |
|
Scan |
PDF
|
821.58KB |
10 |
CD74AC109M |
|
Unknown
|
Historical semiconductor price guide (US$ - 1998). From our catalog scanning project. |
|
Historical |
PDF
|
39.74KB |
1 |
|
CD74AC109M96 |
|
Texas Instruments
|
Dual J-K Positive-Edge-Triggered Flip-Flops with Clear and Preset |
|
Original |
PDF
|
225.97KB |
11 |
CD74AC109M96 |
|
Texas Instruments
|
DUAL POSITIVE-EDGE-TRIGGERED J-K FLIP-FLOPS WITH SET AND RESET |
|
Original |
PDF
|
230.07KB |
8 |
CD74AC109M96 |
|
Texas Instruments
|
Dual Positive-Edge-Triggered J-K Flip-Flops with Set and Reset 16-SOIC -55 to 125 |
|
Original |
PDF
|
657.5KB |
16 |
CD74AC109M96 |
|
Unknown
|
Historical semiconductor price guide (US$ - 1998). From our catalog scanning project. |
|
Historical |
PDF
|
39.74KB |
1 |
CD74AC109M96E4 |
|
Texas Instruments
|
Dual Positive-Edge-Triggered J-K Flip-Flops with Set and Reset |
|
Original |
PDF
|
364.23KB |
12 |
CD74AC109M96E4 |
|
Texas Instruments
|
Dual Positive-Edge-Triggered J-K Flip-Flops with Set and Reset 16-SOIC -55 to 125 |
|
Original |
PDF
|
657.5KB |
16 |