CY2305 Search Results

CY2305

Abstract: CY2308 CY2309
Contextual Info: fax id: 3614 CY2305 and CY2309 as PCI and SDRAM Buffers Introduction to Cypress Zero Delay Buffers What is a Zero Delay Buffer? A zero delay buffer is a device that can fan out 1 clock signal into multiple clock signals with zero delay and very low skew between the outputs. This device is well suited as a buffer for

Contextual Info: CY2305 CY2309 PRELIMINARY CYPRESS Low-Cost 3.3V Zero Delay Buffer for PC and SDRAM ules and is available in a 16-pin SOIC package. The CY2305 is an 8-pin version of the CY2309. It accepts one reference input, and drives out five skew-controlled clocks. Both parts

CY2305SZC-1H

Abstract: CY2305 CY2309 CY2309SC-1
Contextual Info: CY2305 CY2309 Low-cost 3.3V Zero Delay Buffer Features • 10-MHz to 100-/133-MHz operating range, compatible with CPU and PCI bus frequencies up to 100-/133-MHz frequencies, and have higher drive than the -1 devices. All parts have on-chip PLLs which lock to an

5VOLT

Abstract: CY2305 CY2309 CY2308
Contextual Info: CY2305 and CY2309 as PCI and SDRAM Buffers Introduction to Cypress Zero Delay Buffers What is a Zero Delay Buffer? A zero delay buffer is a device that can fan out 1 clock signal into multiple clock signals with zero delay and very low skew between the outputs. This device is well suited as a buffer for

Contextual Info: CY2305 CY2309 Low-Cost 3.3V Zero Delay Buffer Features • 10-MHz to 100-/133-MHz operating range, compatible with CPU and PCI bus frequencies • Zero input-output propagation delay • 60 ps typical cycle-to-cycle jitter high drive • Multiple low-skew outputs

74LS324

Abstract: Radicom V92TM-D 1J23A 85LD0128 AMD29F016 C3528 rtl8139dl reference design c7343 snorteland RJ113
Contextual Info: A B C D COM1 & 2 PARALLEL E SERIAL & PARALLEL INTERFACE CONNECTORS Sheet 10 SDRAM 32-128MB: ISSI IS42S32800B 4 VGA CONNECTOR LCD CONNECTOR & CONFIG. SWITCHES Sheet 17 Sheet 6 SYSTEM CLOCK GEN: CYPRESS CY2305 CY2292 4 COM2 Sheet 3 Sheet 18 RJ11 PHONE CONNECTOR

CY2309ZC-1H

Abstract: CY2305 CY2309 CY2309SC-1 CY2305SC-1T CY2309SI-1T
Contextual Info: CY2305 CY2309 Low-cost 3.3V Zero Delay Buffer Features • 10-MHz to 100-/133-MHz operating range, compatible with CPU and PCI bus frequencies • Zero input-output propagation delay up to 100-/133-MHz frequencies, and have higher drive than the -1 devices. All parts have on-chip PLLs which lock to an

CY2305

Abstract: CY2309 CY2309SC-1
Contextual Info: CY2305 CY2309 Low-cost 3.3V Zero Delay Buffer Features • 10-MHz to 100-/133-MHz operating range, compatible with CPU and PCI bus frequencies • Zero input-output propagation delay • Multiple low-skew outputs — Output-output skew less than 250 ps — Device-device skew less than 700 ps

2309C

Contextual Info: CY2305C CY2309C 3.3 V Zero Delay Clock Buffer 3.3 V Zero Delay Clock Buffer Features skew clocks. The -1H versions of each device operate up to 100–133 MHz frequencies and have higher drive than the -1 devices. All parts have on-chip phase locked loops PLLs which

CY2305SXC-1

Abstract: CY2305ESXC-1 CY2309SXC-1H CY2309SXC-1T CY2305 CY2305SC-1 CY2309 CY2305E
Contextual Info: CY2305 CY2309 Low-Cost 3.3V Zero Delay Buffer Features Functional Description • 10 MHz to 100-/133 MHz operating range, compatible with CPU and PCI bus frequencies ■ Zero input-output propagation delay ■ 60 ps typical cycle-to-cycle jitter high drive

CK200

Abstract: CY2305
Contextual Info: fax id: 3527 CY2305 CY2309 C 'i- Low-Cost 3.3V Zero Delay Buffer for PC and SDRAM Features ules and is available in a 16-pin SO IC package. The C Y 2305 is an 8-pin version of th e CY2309. It accepts one reference input, and drives out five low skew clocks. The -1H version s of

CY2305SI-IH

Abstract: CY2305-1 CY2305 CY2309 CY2309SC-1
Contextual Info: 9 CY2305 CY2309 Low-Cost 3.3V Zero Delay Buffer Features • 10-MHz to 100-/133-MHz operating range, compatible with CPU and PCI bus frequencies • Zero input-output propagation delay • Multiple low-skew outputs — Output-output skew less than 250 ps — Device-device skew less than 700 ps

Contextual Info: CY2305 CY2309 Low-cost 3.3V Zero Delay Buffer Features • 10-MHz to 100-/133-MHz operating range, compatible with CPU and PCI bus frequencies up to 100-/133-MHz frequencies, and have higher drive than the -1 devices. All parts have on-chip PLLs which lock to an

CY2304

Abstract: CY2308
Contextual Info: Cypress Semiconductor Product Qualification Report QTP# 98204 VERSION 2.0 October, 2000 Zero Delay Buffer, 3.3V L28 Technology, Fab 2 CY2305/CY2309 10-MHz to 100/133-MHZ CY2304/CY2308 10-MHz to 133-MHZ CYPRESS TECHNICAL CONTACT FOR QUALIFICATION DATA: Ed Russell

CY2305E

Contextual Info: CY2305 CY2309 Low-Cost 3.3V Zero Delay Buffer Features Functional Description • 10 MHz to 100-/133 MHz operating range, compatible with CPU and PCI bus frequencies ■ Zero input-output propagation delay ■ 60 ps typical cycle-to-cycle jitter high drive

23096

Abstract: CY2305 CY2305SC CY2309
Contextual Info: fax id: 3527 1CY 230 9 CY2305 CY2309 Low-Cost 3.3V Zero Delay Buffer for PC and SDRAM Features ules and is available in a 16-pin SOIC package. The CY2305 is an 8-pin version of the CY2309. It accepts one reference input, and drives out five low skew clocks. Both parts have

CY2305

Abstract: CY2305SC-1 CY2309 CY2309SC-1 CY2305SZC-1 CY2305C
Contextual Info: CY2305, CY2309 Low Cost 3.3-V Zero Delay Buffer Features Functional Description • 10 MHz to 100/133 MHz operating range, compatible with CPU and PCI bus frequencies ■ Zero input-output propagation delay ■ 60-ps typical cycle-to-cycle jitter high drive

CY2305SC-1

Abstract: CY2309 CY2305
Contextual Info: CY2305, CY2309 Low Cost 3.3V Zero Delay Buffer Features Functional Description • 10 MHz to 100/133 MHz operating range, compatible with CPU and PCI bus frequencies ■ Zero input-output propagation delay ■ 60 ps typical cycle-to-cycle jitter high drive

Contextual Info: fax id: 3527 CY2305 CY2309 Low-Cost 3.3V Zero Delay Buffer for PC and SDRAM ules and is available in a 16-pin SOIC or TSSOP package. The CY2305 is an 8-pin version of the CY2309. It accepts one ref­ erence input, and drives out five low skew clocks. The -1H

CY2309-1

Abstract: CY2305 CY2305-1 CY2305SC CY2309
Contextual Info: fax id: 3527 CY2305 CY2309 Low-Cost 3.3V Zero Delay Buffer for PC and SDRAM Features ules and is available in a 16-pin SOIC package. The CY2305 is an 8-pin version of the CY2309. It accepts one reference input, and drives out five low skew clocks. The -1H versions of

CY2305

Abstract: CY2305C CY2305C-1 CY2309 CY2309C
Contextual Info: CY2305C CY2309C PRELIMINARY 3.3V Zero Delay Clock Buffer Features • 10 MHz to 100-133 MHz operating range, compatible with CPU and PCI bus frequencies ■ Zero input and output propagation delay ■ Multiple low skew outputs ■ One input drives five outputs CY2305C

Contextual Info: CY2305C CY2309C 3.3 V Zero Delay Clock Buffer Features skew clocks. The -1H versions of each device operate up to 100–133 MHz frequencies and have higher drive than the -1 devices. All parts have on-chip phase-locked loops PLLs which lock to an input clock on the REF pin. The PLL feedback is

Contextual Info: fax id: 3527 CY2305 CY2309 ^CYPRESS Low-Cost 3.3V Zero Delay Buffer for PC and SDRAM Features ules and is available in a 16-pin S O IC o r T S S O P package. The C Y 2 30 5 is an 8-pin version o f th e C Y 2309. It accepts one ref­ e re nce input, and drives o u t five low skew clocks. T he -1H

CY2305

Abstract: CY2308 CY2309
Contextual Info: CY2305 and CY2309 as PCI and SDRAM Buffers Introduction to Cypress Zero Delay Buffers What is a Zero Delay Buffer? A zero delay buffer is a device that can fan out 1 clock signal into multiple clock signals with zero delay and very low skew between the outputs. This device is well suited as a buffer for