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    CY7C1367C Search Results

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    CY7C1367C Price and Stock

    Flip Electronics CY7C1367C-166AXC

    IC SRAM 9MBIT PARALLEL 100TQFP
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    DigiKey CY7C1367C-166AXC Bulk 68
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    Infineon Technologies AG CY7C1367C-166AXC

    IC SRAM 9MBIT PARALLEL 100TQFP
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    DigiKey CY7C1367C-166AXC Tray 144
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    Avnet Americas CY7C1367C-166AXC Tray 144
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    Infineon Technologies AG CY7C1367C-166AXCT

    IC SRAM 9MBIT PARALLEL 100TQFP
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    DigiKey CY7C1367C-166AXCT Reel 750
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    Avnet Americas CY7C1367C-166AXCT Reel 750
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    Cypress Semiconductor CY7C1367C-166AXC

    SRAM Chip Sync Dual 3.3V 9M-bit 512K x 18 3.5ns 100-Pin TQFP Tray
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    Verical CY7C1367C-166AXC 73 30
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    Bristol Electronics CY7C1367C-166AXC 72
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    Quest Components CY7C1367C-166AXC 57
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    Rochester Electronics CY7C1367C-166AXC 73 1
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    Flip Electronics CY7C1367C-166AXC 68
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    Cypress Semiconductor CY7C1367C166AXCT

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    Bristol Electronics CY7C1367C166AXCT 2,505
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    CY7C1367C Datasheets (21)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF
    CY7C1367C Cypress Semiconductor 9-Mbit (256K x 36/512K x 18) Pipelined DCD Sync SRAM Original PDF
    CY7C1367C-166AXC Cypress Semiconductor Memory, Integrated Circuits (ICs), IC SRAM 9MBIT 166MHZ 100TQFP Original PDF
    CY7C1367C-166AXC Cypress Semiconductor 9-Mbit (256K x 36/512K x 18) Pipelined DCD Sync SRAM Original PDF
    CY7C1367C-166AXC Cypress Semiconductor 9-Mbit (256K x 36/512K x 18) Pipelined DCD Sync SRAM Original PDF
    CY7C1367C-166AXCT Cypress Semiconductor Memory, Integrated Circuits (ICs), IC SRAM 9MBIT 166MHZ 100TQFP Original PDF
    CY7C1367C-166AXCT Cypress Semiconductor 9-Mbit (256K x 36/512K x 18) Pipelined DCD Sync SRAM; Architecture: Standard Sync, Pipeline DCD; Density: 9 Mb; Organization: 512Kb x 18; Vcc (V): 3.1 to 3.6 V Original PDF
    CY7C1367C-166AXI Cypress Semiconductor 9-Mbit (256K x 36/512K x 18) Pipelined DCD Sync SRAM Original PDF
    CY7C1367C-166BGC Cypress Semiconductor 9-Mbit (256K x 36/512K x 18) Pipelined DCD Sync SRAM Original PDF
    CY7C1367C-166BGI Cypress Semiconductor 9-Mbit (256K x 36/512K x 18) Pipelined DCD Sync SRAM Original PDF
    CY7C1367C-200AXC Cypress Semiconductor 9-Mbit (256K x 36/512K x 18) Pipelined DCD Sync SRAM Original PDF
    CY7C1367C-200AXI Cypress Semiconductor 9-Mbit (256K x 36/512K x 18) Pipelined DCD Sync SRAM Original PDF
    CY7C1367C-200BGC Cypress Semiconductor 9-Mbit (256K x 36/512K x 18) Pipelined DCD Sync SRAM Original PDF
    CY7C1367C-200BGI Cypress Semiconductor 9-Mbit (256K x 36/512K x 18) Pipelined DCD Sync SRAM Original PDF
    CY7C1367C-200BZC Cypress Semiconductor 9-Mbit (256K x 36/512K x 18) Pipelined DCD Sync SRAM Original PDF
    CY7C1367C-200BZI Cypress Semiconductor 9-Mbit (256K x 36/512K x 18) Pipelined DCD Sync SRAM Original PDF
    CY7C1367C-225AXC Cypress Semiconductor 9-Mbit (256K x 36/512K x 18) Pipelined DCD Sync SRAM Original PDF
    CY7C1367C-225AXI Cypress Semiconductor 9-Mbit (256K x 36/512K x 18) Pipelined DCD Sync SRAM Original PDF
    CY7C1367C-225BGC Cypress Semiconductor 9-Mbit (256K x 36/512K x 18) Pipelined DCD Sync SRAM Original PDF
    CY7C1367C-225BGI Cypress Semiconductor 9-Mbit (256K x 36/512K x 18) Pipelined DCD Sync SRAM Original PDF
    CY7C1367C-225BZC Cypress Semiconductor 9-Mbit (256K x 36/512K x 18) Pipelined DCD Sync SRAM Original PDF

    CY7C1367C Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    Untitled

    Abstract: No abstract text available
    Text: CY7C1366C CY7C1367C 9-Mbit 256K x 36/512K x 18 Pipelined DCD Sync SRAM Functional Description[1] Features • Supports bus operation up to 250 MHz • Available speed grades are 250, 200, and 166 MHz • Registered inputs and outputs for pipelined operation


    Original
    PDF CY7C1366C CY7C1367C 36/512K 250-MHz 200-MHz 166-MHz 100-pin

    Untitled

    Abstract: No abstract text available
    Text: CY7C1366C, CY7C1367C 9-Mbit 256 K x 36/512 K × 18 Pipelined DCD Sync SRAM 9-Mbit (256 K × 36/512 K × 18) Pipelined DCD Sync SRAM Features Functional Description  Supports bus operation up to 166 MHz  Available speed grade is 166 MHz  Registered inputs and outputs for pipelined operation


    Original
    PDF CY7C1366C, CY7C1367C CY7C1366C/CY7C1367C

    Untitled

    Abstract: No abstract text available
    Text: CY7C1366C, CY7C1367C 9-Mbit 256 K x 36/512 K × 18 Pipelined DCD Sync SRAM 9-Mbit (256 K × 36/512 K × 18) Pipelined DCD Sync SRAM Features Functional Description • Supports bus operation up to 166 MHz ■ Available speed grade is 166 MHz ■ Registered inputs and outputs for pipelined operation


    Original
    PDF CY7C1366C, CY7C1367C CY7C1366C/CY7C1367C

    CY7C1366C

    Abstract: CY7C1367C
    Text: CY7C1366C/CY7C1367C 9-Mbit 256K x 36/512K x 18 Pipelined DCD Sync SRAM Features Functional Description The CY7C1366C/CY7C1367C SRAM[1] integrates 256K x 36 and 512K x 18 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter for internal burst


    Original
    PDF CY7C1366C/CY7C1367C 36/512K CY7C1366C/CY7C1367C CY7C1366C CY7C1367C

    CY7C1366C

    Abstract: CY7C1367C
    Text: CY7C1366C/CY7C1367C 9-Mbit 256 K x 36/512 K × 18 Pipelined DCD Sync SRAM 9-Mbit (256 K × 36/512 K × 18) Pipelined DCD Sync SRAM Features Functional Description • Supports bus operation up to 250 MHz ■ Available speed grades are 250, 200, and 166 MHz


    Original
    PDF CY7C1366C/CY7C1367C CY7C1366C CY7C1367C

    Untitled

    Abstract: No abstract text available
    Text: CY7C1366C CY7C1367C PRELIMINARY 9-Mbit 256K x 36/512K x 18 Pipelined DCD Sync SRAM Functional Description[1] Features • Supports bus operation up to 225 MHz • Available speed grades are 225, 200 and 166 MHz • Registered inputs and outputs for pipelined operation


    Original
    PDF CY7C1366C CY7C1367C 36/512K 225-MHz CY7C1366C/CY7C1367C

    Untitled

    Abstract: No abstract text available
    Text: CY7C1366C/CY7C1367C 9-Mbit 256 K x 36/512 K × 18 Pipelined DCD Sync SRAM 9-Mbit (256 K × 36/512 K × 18) Pipelined DCD Sync SRAM Features Functional Description • Supports bus operation up to 250 MHz ■ Available speed grades are 250, 200, and 166 MHz


    Original
    PDF CY7C1366C/CY7C1367C CY7C1366C/CY7C1367C

    CY7C1366C

    Abstract: CY7C1367C
    Text: CY7C1366C CY7C1367C 9-Mbit 256K x 36/512K x 18 Pipelined DCD Sync SRAM Functional Description[1] Features • Supports bus operation up to 250 MHz • Available speed grades are 250, 200, and 166 MHz • Registered inputs and outputs for pipelined operation


    Original
    PDF CY7C1366C CY7C1367C 36/512K 250-MHz CY7C1366C/CY7C1367C CY7C1366C CY7C1367C

    CY7C1366C

    Abstract: CY7C1367C
    Text: CY7C1366C CY7C1367C 9-Mbit 256K x 36/512K x 18 Pipelined DCD Sync SRAM Functional Description[1] Features • Supports bus operation up to 250 MHz • Available speed grades are 250, 200, and 166 MHz • Registered inputs and outputs for pipelined operation


    Original
    PDF CY7C1366C CY7C1367C 36/512K 250-MHz CY7C1366C/CY7C1367C CY7C1366C CY7C1367C

    Untitled

    Abstract: No abstract text available
    Text: CY7C1366C, CY7C1367C 9-Mbit 256 K x 36/512 K × 18 Pipelined DCD Sync SRAM 9-Mbit (256 K × 36/512 K × 18) Pipelined DCD Sync SRAM Features Functional Description • Supports bus operation up to 166 MHz ■ Available speed grade is 166 MHz ■ Registered inputs and outputs for pipelined operation


    Original
    PDF CY7C1366C, CY7C1367C

    Untitled

    Abstract: No abstract text available
    Text: CY7C1366C CY7C1367C PRELIMINARY 9-Mbit 256K x 36/512K x 18 Pipelined DCD Sync SRAM Functional Description[1] Features • Supports bus operation up to 250 MHz • Available speed grades are 250, 200 and 166 MHz • Registered inputs and outputs for pipelined operation


    Original
    PDF CY7C1366C CY7C1367C 36/512K 250-MHz 200-MHz 166-MHz 100-Pin

    Untitled

    Abstract: No abstract text available
    Text: CY7C1386DV25 CY7C1387DV25 PRELIMINARY 18-Mbit 512K x 36/1M x 18 Pipelined DCD Sync SRAM Functional Description[1] Features • Supports bus operation up to 250 MHz • Available speed grades are 250, 225, 200, and 167 MHz • Registered inputs and outputs for pipelined operation


    Original
    PDF CY7C1386DV25 CY7C1387DV25 18-Mbit 36/1M 250-MHz 225-MHz 200-MHz 167-MHz

    CY7C1338-100AXC

    Abstract: gvt7164d32q-6 CY7C1049BV33-12VXC CY7C1363C-133AC CY7C1021DV33-12ZXC CY7C1460AV25-200AXC CY7C1338G-100AC CY7C1041V33-12ZXC CY7C1460V33-200AXC CY7C1021DV33-10ZXC
    Text: CYPRESS / GALVANTECH # - Connect pin 14 FT pin to Vss CY7C1019BV33-15VC GS71108AJ-12 & - Does not support 1.8V I/O CY7C1019BV33-15VXC GS71108AGJ-12 * - Tie down extra four I/Os with resistor CY7C1019BV33-15ZC GS71108ATP-12 CY7C1019BV33-15ZXC GS71108AGP-12


    Original
    PDF CY7C1019BV33-15VC GS71108AJ-12 CY7C1019BV33-15VXC GS71108AGJ-12 CY7C1019BV33-15ZC GS71108ATP-12 CY7C1019BV33-15ZXC GS71108AGP-12 CY7C1019CV33-10VC GS71108AJ-10 CY7C1338-100AXC gvt7164d32q-6 CY7C1049BV33-12VXC CY7C1363C-133AC CY7C1021DV33-12ZXC CY7C1460AV25-200AXC CY7C1338G-100AC CY7C1041V33-12ZXC CY7C1460V33-200AXC CY7C1021DV33-10ZXC

    Untitled

    Abstract: No abstract text available
    Text: CY7C1386DV25 CY7C1387DV25 PRELIMINARY 18-Mbit 512K x 36/1M x 18 Pipelined DCD Sync SRAM Functional Description[1] Features • Supports bus operation up to 250 MHz • Available speed grades are 250, 200, and 167 MHz • Registered inputs and outputs for pipelined operation


    Original
    PDF CY7C1386DV25 CY7C1387DV25 18-Mbit 36/1M 250-MHz 200-MHz 167-MHz 119-BGA