CY7C374 Search Results

84 PIN CERAMIC QUAD FLAT PACK

Abstract: 2600 corning cypress flash 370 7C374-100 7C374-66 7C374L-66 CY7C373 CY7C374 FLASH370 CY7C374-83GC
Contextual Info: fax id: 6129 —— — - = : ! W Æ j r I 1 CY7C374 17 Q Q IT C O O UltraLogic 128-Macrocell Flash CPLD Features The logic blocks in the FLASH370 architecture are connected with an extremely fast and predictable routing resource— the Programmable Interconnect Matrix PIM . The PIM brings flex­

Contextual Info: UltraLogic 128-Macrocell Flash CPLD is designed to bring th e ease o f use and high perform ance o f th e 22V10 to highdensity CPLDs. Features • 128 macrocells in eight logic blocks • 64 I/O pins T he 128 m acrocells in th e CY7C374 are di­ vided betw een eight logic blocks. Each

319S2

Contextual Info: WFw CYPRESS CY7C374Ì ADVANCED INFORMATION UltraLogic 128-Macrocell Flash CPLD Features • 128 macrocells in eight logic blocks • 64 I/O pins • 6 dedicated inputs including 4 clock pins • In-System Reprogrammable ISR™ Flash technology — JTAG interface

GI05

Contextual Info: CY7C374i p v p v « *1 X X UltraLogic 128-Macrocell Flash CPLD Feat ures • 1 2 8 m a c r o cel l s in e i gh t l ogi c b l o c k s • 6 4 I/O p i n s • 5 d e d i c a t e d i n p u t s i n c l u d i n g 4 c l oc k pi n s • I n - S y s t e m R e p r o g r a m m a b l e I S R ™ Fl ash t e c h n o l o g y

CY7C373

Abstract: CY7C374 FLASH370 CY7C374-83GC
Contextual Info: 7C373: Thursday, September 24, 1992 Revision: October 14, 1995 CY7C374 UltraLogict 128ĆMacrocell Flash CPLD D D D 128 macrocells in eight logic blocks 64 I/O pins The 128 macrocells in the CY7C374 are diĆ vided between eight logic blocks. Each logic block includes 16 macrocells, a 72 x

26112

Abstract: JESD22 CLCC 96 CY7C374I-JC Nitto-MP8000
Contextual Info: Cypress Semiconductor Qualification Report QTP# 97127VERSION 1.1 August, 1997 UltraLogic 128-Macrocell Flash CPLD CY7C374i/CY7C375i Cypress Semiconductor UltraLogic 128-Mcell Flash CPLD Device: CY7C374I/375I Package: 84-pin PLCC/84-pin CLCC QTP# 97127 Version 1.0

Contextual Info: USE ULTRA37000TM FOR ALL NEW DESIGNS CY7C373i UltraLogic 64-Macrocell Flash CPLD Features • Available in 84-pin PLCC and 100-pin TQFP packages • Pin compatible with the CY7C374i • 64 macrocells in four logic blocks • 64 I/O pins Functional Description

C3157

Contextual Info: fax id: 6139 CY7C374Ì :/ C Y P R E S S UltraLogic 128-Macrocell Flash CPLD Features Functional Description • 128 macrocells in eight logic blocks • 64 I/O pins • 5 dedicated inputs including 4 clock pins The CY7C374i is an In-System Reprogrammable Complex

cypress flash 370

Abstract: architecture of cypress FLASH370 device cypress flash 370 device architecture of cypress FLASH370 cpld CLCC 84 features cypress flash 370 CY7C373 CY7C374 FLASH370 CLCC 100
Contextual Info: fax id: 6129 1CY 7C37 4 For new designs see CY7C374i. CY7C374 UltraLogic 128-Macrocell Flash CPLD Features • • • • • Functional Description 128 macrocells in eight logic blocks 64 I/O pins 6 dedicated inputs including 4 clock pins No hidden delays

Contextual Info: fax id: 6139 CY7C374Ì ^C YPR ESS UltraLogic 128-Macrocell Flash CPLD Features • • • • Functional Description 128 macrocells in eight logic blocks 64 I/O pins 5 dedicated inputs including 4 clock pins In-System Reprogram mable ISR™ Flash technology

p900v

Abstract: CY7C374 CY7C375 EME-6300H JESD22
Contextual Info: Qualification Report September 1996, QTP# 96176, Version 1.0 128-Macrocell Flash CPLD CY7C374I/375I PRODUCT DESCRIPTION (for qualification) Information provided in this document is intended for generic qualification and technically describes the Cypress part supplied:

ULTRA37000

Contextual Info: USE ULTRA37000 FOR ALL NEW DESIGNS CY7C374i UltraLogic™ 128-Macrocell Flash CPLD Features • • • • • • • • • • • Functional Description 128 macrocells in eight logic blocks 64 I/O pins Five dedicated inputs including four clock pins

Contextual Info: Revision: June 24, 1996 rw CYPRESS CY7C374 - UltraLogic 128-Macrocell Flash CPLC T h e logic blocks in the F l a s h 370 arch itecture are con ne cte d w ith an e xtrem e ly fast and pre dicta ble routing resource— the P rog ram m a ble Interconnect M atrix PIM . T h e PIM brings fle x ­

Contextual Info: fax id: 6139 CY7C374Ì C'i- UltraLogic 128-Macrocell Flash CPLD Features Functional Description • 128 macrocells in eight logic blocks • 64 I/O pins • 5 dedicated inputs including 4 clock pins • In-System Reprogrammable ISR™ Flash technology

Contextual Info: CY7C374 PRELIMINARY CYPRESS SEMICONDUCTOR Features • 128 macrocells in eight logic blocks • 64 I/O pins • 6 dedicated inputs including 4 clock pins • No hidden delays • High speed — I.max ~ 100 MHz — tpD = 12 ns — tg = 9 ns — tc o = 9 ns

architecture of cypress FLASH370 cpld

Abstract: 100pinTQFP
Contextual Info: fax id: 6139 CY7C374i UltraLogic 128-Macrocell Flash CPLD Features Functional Description • • • • 128 macrocells in eight logic blocks 64 I/O pins 5 dedicated inputs including 4 clock pins In-System Reprogrammable ISR™ Flash technology — JTAG interface

ULTRA37000

Contextual Info: USE ULTRA37000 FOR ALL NEW DESIGNS CY7C374i UltraLogic™ 128-Macrocell Flash CPLD Features • • • • • • • • • • • Functional Description 128 macrocells in eight logic blocks 64 I/O pins Five dedicated inputs including four clock pins

Contextual Info: CY7C374 W f CYPRESS UltraLogic 128-Macrocell Flash CPLD Features • 128 macrocells in eight logic blocks • 64 I/O pins • 6 dedicated inputs including 4 clock pins • No hidden delays • High speed f M A X = 100 MHz — tpi = 12 ns — ts = 7 ns

Contextual Info: 74i CY7C374i UltraLogic 128-Macrocell Flash CPLD Features Functional Description • • • • 128 macrocells in eight logic blocks 64 I/O pins 5 dedicated inputs including 4 clock pins In-System Reprogrammable™ ISR™ Flash technology — JTAG interface

CY7C374-66AI

Abstract: cypress flash 370 CY7C373 CY7C374 FLASH370
Contextual Info: For new designs see CY7C374i CY7C374 UltraLogic 128-Macrocell Flash CPLD Features • • • • • • Functional Description 128 macrocells in eight logic blocks 64 I/O pins 6 dedicated inputs including 4 clock pins Bus Hold capabilities on all I/Os and dedicated inputs

Contextual Info: fax id: 6138 CY7C373Ì C'i- UltraLogic 64-Macrocell Flash CPLD • Pin compatible with the CY7C374i Features Functional Description • 64 macrocells in four logic blocks • 64 I/O pins • 5 dedicated inputs including 4 clock pins • In-System Reprogrammable ISR™ Flash technology

cypress flash 370 device

Abstract: CY7C373 CY7C374 FLASH370 logic block diagram of cypress flash 370 device
Contextual Info: For new designs see CY7C374i CY7C374 UltraLogic 128-Macrocell Flash CPLD Features • • • • • • Functional Description 128 macrocells in eight logic blocks 64 I/O pins 6 dedicated inputs including 4 clock pins Bus Hold capabilities on all I/Os and dedicated inputs

84 PIN CERAMIC QUAD FLAT PACK

Abstract: 84 PLCC pin configuration CY7C374I-66JI CERAMIC leaded CHIP CARRIER CLCC 68
Contextual Info: fax id: 6139 CY7C374i UltraLogic 128-Macrocell Flash CPLD Features Functional Description • • • • 128 macrocells in eight logic blocks 64 I/O pins 5 dedicated inputs including 4 clock pins In-System Reprogrammable ISR™ Flash technology — JTAG interface

Contextual Info: CY7C374i UltraLogic 128-Macrocell Flash CPLD Features Functional Description • • • • 128 macrocells in eight logic blocks 64 I/O pins 5 dedicated inputs including 4 clock pins In-System Reprogrammable ISR™ Flash technology — JTAG interface