CYDXXS36V18 Search Results

CYDXXS36V18 Datasheets Context Search

Catalog Datasheet	Type	Document Tags	PDF
FullFlex36 Contextual Info: CYDXXS72V18 CYDXXS36V18 CYDXXS18V18 FullFlex Synchronous SDR Dual Port SRAM FullFlex™ Synchronous SDR Dual Port SRAM Features Functional Description • True dual port memory enables simultaneous access the shared array from each port ■ Synchronous pipelined operation with single data rate SDR	Original	CYDXXS72V18 CYDXXS36V18 CYDXXS18V18 18-Mbit, 36-Mbit FullFlex72 72-bit FullFlex36	PDF
FullFlex36 Contextual Info: CYDXXS72V18 CYDXXS36V18 CYDXXS18V18 FullFlex Synchronous SDR Dual Port SRAM FullFlex™ Synchronous SDR Dual Port SRAM Features Functional Description • True dual port memory enables simultaneous access the shared array from each port ■ Synchronous pipelined operation with single data rate SDR	Original	CYDXXS72V18 CYDXXS36V18 CYDXXS18V18 18-Mbit, 36-Mbit FullFlex72 72-bit FullFlex36	PDF
FullFlex36 Abstract: CYDXXS36V18 400 OHM RESISTOR DQ67 Contextual Info: CYDXXS72V18 CYDXXS36V18 CYDXXS18V18 FullFlex Synchronous SDR Dual Port SRAM FullFlex™ Synchronous SDR Dual Port SRAM Features Functional Description • True dual port memory enables simultaneous access the shared array from each port ■ Synchronous pipelined operation with single data rate SDR	Original	CYDXXS72V18 CYDXXS36V18 CYDXXS18V18 18-Mbit, 36-Mbit FullFlex72 72-bit FullFlex36 400 OHM RESISTOR DQ67	PDF
FullFlex36 Contextual Info: CYDXXS72V18 CYDXXS36V18 CYDXXS18V18 FullFlex Synchronous SDR Dual Port SRAM FullFlex™ Synchronous SDR Dual Port SRAM Features Functional Description • True dual port memory enables simultaneous access the shared array from each port ■ Synchronous pipelined operation with single data rate SDR	Original	CYDXXS72V18 CYDXXS36V18 CYDXXS18V18 72-bit 484-ball 256-ball FullFlex36	PDF
FullFlex36 Contextual Info: CYDXXS72V18 CYDXXS36V18 CYDXXS18V18 FullFlex Synchronous SDR Dual Port SRAM FullFlex™ Synchronous SDR Dual Port SRAM Features Functional Description • True dual port memory enables simultaneous access the shared array from each port ■ Synchronous pipelined operation with single data rate SDR	Original	CYDXXS72V18 CYDXXS36V18 CYDXXS18V18 72-bit 18-Mbit, 36-Mbit FullFlex36	PDF
CYD04S18V18 Abstract: DSA002918 CYD04S36V18 CYD09S36V18 CYD18S18V18 CYD18S36V18 CYDXXS36V18 256-BALL Contextual Info: CONFIDENTIAL ERRATA DOCUMENT CYDxxS36V18 CYDxxS18V18 Errata Revision: * March 15, 2006 Errata Document for CYDxxS36V18/CYDxxS18V18 18-Mb/9-Mb/4-Mb x36/x18 FullFlex Dual-Ports This document describes the errata for the 18Mb/9Mb/4Mb x36/x18 FullFlex™ Dual-Ports CYDxxS36V18/CYDxxS18V18 .	Original	CYDxxS36V18 CYDxxS18V18 CYDxxS36V18/CYDxxS18V18 18-Mb/9-Mb/4-Mb x36/x18 18Mb/9Mb/4Mb CYDxxS36V18/CYDxxS18V18) CYD18S36V18 256-Ball CYD04S18V18 DSA002918 CYD04S36V18 CYD09S36V18 CYD18S18V18 CYD18S36V18 CYDXXS36V18	PDF
FullFlex36 Contextual Info: FullFlex FullFlex Synchronous DDR Dual-Port SRAM Features • True dual-ported memory allows simultaneous access to the shared array from each port • Synchronous pipelined operation with selectable Double Data Rate DDR or Single Data Rate (SDR) operation on each port	Original	36-Gb/s 484-ball 256-ball FullFlex72 CYDD36S72V18) CYDD18S72V1t 27mmx27mmx2 36Mx36 36Mx18 FullFlex36	PDF
FullFlex36 Contextual Info: PRELIMINARY FullFlex Synchronous DDR Dual-Port SRAM Features • True dual-ported memory allows simultaneous access to the shared array from each port • Synchronous pipelined operation with selectable Double Data Rate DDR or Single Data Rate (SDR) operation on each port	Original	36-Gb/s 484-ball 256-ball FullFlex72 CYDD36S72V18) CYDD18S72V18 XS36V18 CYDXXS18V18 BW256 FullFlex36	PDF
FullFlex36 Contextual Info: FullFlex FullFlex Synchronous DDR Dual-Port SRAM Features • True dual-ported memory allows simultaneous access to the shared array from each port • Synchronous pipelined operation with selectable Double Data Rate DDR or Single Data Rate (SDR) operation on each port	Original	36-Gb/s 484-ball 256-ball FullFlex72 CYDD36S72V18) CYDD18S72V1mation 27mmx27mmx2 36Mx36 36Mx18 FullFlex36	PDF
FullFlex36 Abstract: 2BE6 Contextual Info: FullFlex FullFlex Synchronous DDR Dual-Port SRAM Features • True dual-ported memory allows simultaneous access to the shared array from each port • Synchronous pipelined operation with selectable Double Data Rate DDR or Single Data Rate (SDR) operation on each port	Original	36-Gb/s 6Mx18 36Mx72 CYDD36S72V18 FullFlex36 2BE6	PDF
DQ12-DQ15 Abstract: CYDXXS36V18 16-SD FullFlex36 Contextual Info: PRELIMINARY FullFlex Synchronous DDR Dual-Port SRAM Features • True dual-ported memory allows simultaneous access to the shared array from each port • Synchronous pipelined operation with selectable Double Data Rate DDR or Single Data Rate (SDR) operation on each port	Original	18-Mbit, 36-Mbit CYDXXS36V18 CYDXXS18V18 256-Ball BW256 FullFlex36 484-ball FullFlex18 DQ12-DQ15 16-SD	PDF
FullFlex36 Abstract: TMS 1070 NL Contextual Info: FullFlex FullFlex Synchronous DDR Dual-Port SRAM Features • True dual-ported memory allows simultaneous access to the shared array from each port • Synchronous pipelined operation with selectable Double Data Rate DDR or Single Data Rate (SDR) operation on each port	Original	36-Gb/s 6Mx18 36Mx72 CYDD36S72V18 FullFlex36 TMS 1070 NL	PDF
BE5L Abstract: FullFlex36 680nA TMS 1070 NL M/CYDD09S72V18 Contextual Info: FullFlex FullFlex Synchronous DDR Dual-Port SRAM Features • True dual-ported memory allows simultaneous access to the shared array from each port • Synchronous pipelined operation with selectable Double Data Rate DDR or Single Data Rate (SDR) operation on each port	Original	36-Gb/s 6Mx72 CYDD36S72V18 BE5L FullFlex36 680nA TMS 1070 NL M/CYDD09S72V18	PDF
FullFlex36 Contextual Info: PRELIMINARY FullFlex Synchronous DDR Dual-Port SRAM Features • True dual-ported memory allows simultaneous access to the shared array from each port • Synchronous pipelined operation with selectable Double Data Rate DDR or Single Data Rate (SDR) operation on each port	Original	36-Gb/s 484-ball 256-ball FullFlex72 CYDD36S72V18) CYDD18S7 27mmx27mmx2 FullFlex36	PDF