CYM74 Search Results

gk 147

Abstract: 82430VX 435B 82430FX 82430HX CYM74P430B CYM74P431B CYM74P434B CYM74P435B
Contextual Info: wÄS53SSS8SSBtote ^ u’i ^ S T n u n n rn p CYM74P430B/431B CYM74P434B/435B PRELIMINARY F L- Ï i n L o b = Intel 82430FX, HX, VX PCIset Pipelined L2 Cache Modules Features The C Y M 7 4P 4 3 0 B /4 3 1 B /4 3 4 B /4 3 5 B m odules are based on in du stry standard 32K x32 synch ron ous pipe lin ed BSRAM .

74321

Abstract: DM 0365 Burndy DZ7 55C burndy CONNECTOR 124 Intel Pentium 66MHz 1993 burndy 12 pin 12646A
Contextual Info: *= p y p - p p q PRELIMINARY ç , ~ CYM7432 256K Pentium -Compatible Cache Module Features Functional Description • 256-Kbyte secondary cache module organized as 32K by 64 • Ideal for Intel ™ Pentium-based sys­ tems and systems with 64-bit data • Operates with 60- and 66-MHz Pen­

Contextual Info: V CYPRESS PRELIMINARY CYM74A430 CYM74S430 CYM74S431 Intel 82430FX PCIset Level II Cache Module Family Features Functional Description • Pin-compatible secondary cache mod­ ule family that adheres to the Intel COAST 1.1 specification, • Asynchronous CYM74A430 or syn­

TU 55x

Abstract: NDM1-63 UEI 20 SP BA 9513
Contextual Info: CYM74B550 CYM 7 4 P 5 5 0 A C Y M 7 4 S 5 5 0 , CY M 7 4 S 5 5 1 OPTi Viper Chip Set Level II Cache Module Family vo lt S R A M s and 3.3 volt level translators. T hese m odules offer 3-2 -2-2 p e rfo rm an ce at GPU bus speeds up to 6 6 MHz. Features • Pi n- co mp a ti b le s e c on da ry c a c h e m o d u l e family

ttl 7492

Abstract: 74912 7490 pin diagram 7490 mod 16 chip 7490 TTL 7490 data 7492 pin out diagram C108H
Contextual Info: PRELIMINARY CYM7490 CYM7491 CYM7492 i486 Level II Cache Module Family Features Functional Description • Cache sizes of 64 KB, 256 KB, or 1 MB • Tag width of 8 bits • Independent dirty bit • Operates with 33-MHz Intel ¡486 processors • Zero-wait-state operation

82430FX

Abstract: CY7C1199 CYM74C430 CYM74C430-50 CYM74C430-60 CYM74C430-65 CYM74C430PM-50C P54C CELP2X80SC3Z48
Contextual Info: 1CY M74 C4 30 CYM74C430 Intel 82430FX PCIset Level II Cache Module Features Functional Description • Pin-compatible secondary cache module family that ad- This secondary cache module is designed for Intel P54C systems with the 82430FX Triton chip set. CYM74C430 is an

D1159

Abstract: ds 157
Contextual Info: PRELIMINARY CYM74B430 CYM74P430/31 CYM74S430/31 Intel 82430FX PCIset Level II Cache Module Family Features * 33V compatible inputs/data outputs • Pin-compatible secondary cache module family that adheres to the Intel COAST 1.1 specification • Asynchronous CYM74B430 , syn­

Contextual Info: CYM74AP54 CYM74SP54 PRELIMINARY CYM74SP55 Intel 82430NX Chip Set Level II Cache Module Family Features Functional Description This family of secondary cache modules is designed for Intel P54C systems with the 82430NX Neptune chip set. CYM74AP54 is an asynchronous

Contextual Info: ‘/ PRELIMINARY CYM7432 cypress 256K Pentium -Compatible Cache Module Features Functional Description • 256-Kbyte secondary cache module organized as 32K by 64 T h e C Y M 7432 is a 256-K byte seco n d ary c ach e m o d u le d e sig n e d fo r In te l P en tiu m

A7A17

Abstract: D56-D63 burndy CONNECTOR 124
Contextual Info: CYM7432 PRELIMINARY 256K PentiumtĆCompatible Cache Module Features D D D D D D D D Functional Description 256ĆKbyte secondary cache module organized as 32K by 64 Ideal for Intelt PentiumĆbased sysĆ tems and systems with 64Ćbit data Operates with 60Ć and 66ĆMHz PenĆ

434B

Abstract: 82430HX 82430VX 82430FX CYM74P430B CYM74P431B CYM74P434B CYM74P435B TIO8
Contextual Info: PRELIMINARY CYM74P430B/431B CYM74P434B/435B Intelt 82430FX,HX,VX PCIset Pipelined L2 Cache Modules D Features D with all four Keying Options defined Secondary cache modules that are in COAST 3.0. ideal for the Intel 82430FX, 82430HX, D and 82430VX chip sets

82430FX

Abstract: CYM74B430 CYM74P430 CYM74P431 CYM74S430 CYM74S431 P54C ZENER A18 Burndy 75 74s430
Contextual Info: PRELIMINARY CYM74B430 CYM74P430/31 CYM74S430/31 Intel 82430FX PCIset Level II Cache Module Family Features D D Functional Description D PinĆcompatible secondary cache modĆ ule family that adheres to the Intel COAST 1.1 specification Ideal for Intel® P54CĆbased systems

D6283

Contextual Info: PRELIMINARY CYM74AP54 CYM74SP54 CYM74SP55 Intelt 82430NX Chip Set Level II Cache Module Family Features Functional Description D PinĆcompatible secondary cache module family D Asynchronous CYM74AP54 or synĆ chronous (CYM74SP54, CYM74SP55) configurations with presence and conĆ

ic 7485

Abstract: pin diagram for IC 7485 pin diagram for IC 7485 input id pin diagram ic 7485 7485 aa ci 7485
Contextual Info: PRELIMINARY CYPRESS SEMICONDUCTOR CYM7485 128K Write-Through Secondary Cache Module Features Functional Description • 128-Kbyte direct-mapped, writethrough, zero-wait-state secondary cache module • Operates with 33-MHz Intel 486 pro­ cessors • Uses low-cost CMOS asynchronous

9919A

Abstract: 16KX8 2H300-24S05 burndy die set specifications CYM74A430PM-50 82430FX CYM74S430 CYM74S431 P54C 32Kx64
Contextual Info: PRELIMINARY ' / C YPRESS CYM74A430 CYM74S430 CYM74S431 Intel 82430FX PCIset Level II Cache Module Family Features Functional Description • Pin-compatible secondary cache mod­ ule family that adheres to the Intel COAST 1.1 specification, • Asynchronous CYM74A430 or syn­

PM-66C

Abstract: TIC 2460 82340 82430FX CYM74B430 CYM74P430 CYM74P431 CYM74S430 CYM74S431 74P431
Contextual Info: ^ S -;= i a g T n u n n rn r y L - Ï i PRELIMINARY n Lob = Intel 82340FX PCIset Level II Cache Module Family Features • Pin-compatible secondary cache m odulefam ily that ad­ heres to the Intel COAST 1.1 specification • Asynchronous CYM74B430 , synchronous pipelined

A5 GNC

Abstract: A1W 73 c877 A64A A1 GNC cym74sp55pm 82430NX CYM74BP54 CYM74P54 0/mosfet A5 GNC
Contextual Info: CYM74BP54 CYM74P54/55 CYM74SP54/55 æ r~ ^ S T •= • > y PRELIMINARY n u n n rn r L- Ï i n L o b = Intel 82430NX Chipset Level II Cache Module Family Features • Pin-compatible secondary cache module fam ily • Asynchronous CYM74BP54 , synchronous pipelined

74555

Abstract: ZENER A17 LA17-LA5 CYM74B550 CYM74P550A CYM74S550 CYM74S551 74S551 OPTi viper
Contextual Info: ^ S T ñ u n n rn r CYM74B550 CYM74P550A CYM74S550, CYM74S551 PRELIMINARY •=•> y L- Ï i n L o b = OPTi Viper Chip Set Level II Cache Module Family volt SRAMs and 3.3 volt level translators. These modules offer 3-2-2-2 performance at CPU bus speeds up to 6 6 MHz.

74S590

Abstract: 74S59X
Contextual Info: PRELIMINARY CYM74A590 CYM74S590 CYM74S591 VLSI 82C590 Chip Set Level II Cache Module Family Features Functional Description • Pin-compatible secondary cache module family • Asynchronous CYM74Â590 or syn­ chronous (CYM74S590, CYM74S591) configurations with presence and con­

74P55

Abstract: LA17-LA5
Contextual Info: 1CY M74 SP5 4/55 CYM74BP54 CYM74P54/55 CYM74SP54/55 PRELIMINARY Intel 82430NX Chipset Level II Cache Module Family Features dustry standard 5V SRAMs and 3.3V level translators for CPU bus speeds up to 66 MHz. The CYM74BP54 is organized as 32K by 64-bits.

Contextual Info: CYPRESS CYM74BP54 CYM74P54/55 CYM74SP54/55 PRELIMINARY Features • Pin-compatible secondary cache m odule fam ily • Asynchronous CYM74BP54 , synchronous pipelined (CYM74P54, CYM74P55), or synchronous (CYM74SP54, CYM74SP55) configurations with pres­ ence and configuration detect pins

Contextual Info: CYM74P430B/431B CYM74P434B/435B .-Sw ^ ^ gy PRELIMINARY 1^ p ^ - ' ^ l« ^ |! " I |'~!:^ ^ ? | Intel 82430FX, HX, VX PCIset Pipelined L2 Cache Modules Features T he C Y M 7 4 P 4 3 0 B /4 3 1 B /4 3 4 B /4 3 5 B m odules are based on in d u stry stan dard 32K x32 synch ron ous pipe lin ed BSR AM .

Contextual Info: CYM74C430 CYPRESS Intel 82430FX PCIset Level II Cache Module Features Functional Description • This secondary cache module is designed for Intel P54C sys­ tem s with the 82430FX Triton chip set. CYM74C430 is an asynchronous 256-Kbyte cache module that provides a low-cost,

Contextual Info: p r e l im in a r y CYPRESS CYM74A550, CYM74A551 CYM74S550, CYM74S551 OPTi Viper Chipset Level II Cache Module Family Features Functional Description • Pin-compatible secondary cache module family T his fam ily o f s eco n d ary cach e m o d u le s is