FCT138A Search Results

FT138-1

Contextual Info: CY54FCT138T, CY74FCT138T 1-OF-8 DECODERS SCCS013B – MAY 1994 – REVISED OCTOBER 2001 D D D D D D D 1 16 2 15 3 14 4 13 5 12 6 11 7 10 8 9 VCC O0 O1 O2 O3 O4 O5 O6 CY54FCT138T . . . L PACKAGE TOP VIEW A1 A0 NC VCC O0 D A0 A1 A2 E1 E2 E3 O7 GND A2 E1 NC

Contextual Info: CY54/74FCT138T 1-OF-8 DECODER CYPRESS FEATURES • Function, Pinout and Drive Compatible with the FCT and F Logic ■ Power-off disable feature ■ Matched Rise and Fall times ■ FCT-C speed at 5.0ns max. Com'l FCT-A speed at 5.8ns max. (Com'l) ■ Fully Compatible with TTL Input and Output

Contextual Info: CY54FCT138T, CY74FCT138T 1-OF-8 DECODERS SCCS013B – MAY 1994 – REVISED OCTOBER 2001 D D D D D D D 1 16 2 15 3 14 4 13 5 12 6 11 7 10 8 9 VCC O0 O1 O2 O3 O4 O5 O6 CY54FCT138T . . . L PACKAGE TOP VIEW A1 A0 NC VCC O0 D A0 A1 A2 E1 E2 E3 O7 GND A2 E1 NC

Contextual Info: IDT54/74FCT138T/AT/CT FAST CMOS 1-OF-8 DECODER WITH ENABLE MILITARY AND INDUSTRIAL TEMPERATURE RANGES FAST CMOS 1-OF-8 DECODER WITH ENABLE IDT54/74FCT138T/AT/CT FEATURES: DESCRIPTION: − − − − The IDT54/74FCT138T is a 1-of-8 decoder built using an advanced

A115-A

Abstract: C101 CY54FCT138T CY74FCT138T
Contextual Info: CY54FCT138T, CY74FCT138T 1-OF-8 DECODERS SCCS013B – MAY 1994 – REVISED OCTOBER 2001 D D D D D D D 1 16 2 15 3 14 4 13 5 12 6 11 7 10 8 9 VCC O0 O1 O2 O3 O4 O5 O6 CY54FCT138T . . . L PACKAGE TOP VIEW A1 A0 NC VCC O0 D A0 A1 A2 E1 E2 E3 O7 GND A2 E1 NC

CY74FCT138ATQCT

Abstract: CY74FCT138CTQCT
Contextual Info: Data sheet acquired from Cypress Semiconductor Corporation. Data sheet modified to remove devices not offered. CY54/74FCT138T 1-of-8 Decoder SCCS013 - May 1994 - Revised February 2000 Features • Function, pinout, and drive compatible with FCT and F logic

Contextual Info: CY54FCT138T, CY74FCT138T 1-OF-8 DECODERS SCCS013B – MAY 1994 – REVISED OCTOBER 2001 D D D D D D D 1 16 2 15 3 14 4 13 5 12 6 11 7 10 8 9 VCC O0 O1 O2 O3 O4 O5 O6 CY54FCT138T . . . L PACKAGE TOP VIEW A1 A0 NC VCC O0 D A0 A1 A2 E1 E2 E3 O7 GND A2 E1 NC

Contextual Info: CY54/74FCT138T 1-OF-8 DECODER CYPRESS FEATURES • Function, Pinout and Drive Compatible with the FCT and F Logic ■ Power-off disable feature ■ Matched Rise and Fall times ■ FCT-C speed at 5.0ns max. Com'l FCT-A speed at 5.8ns max. (Com'l) ■ Fully Compatible with TTL Input and Output

FCT138A

Contextual Info: 138 A 33 ÆM National Semiconductor FCT138A 1-of-8 Decoder/Demultiplexer General Description Features The ’FCT138A is a high-speed 1-of- 8 decoder/demultiplex­ er. This device is ideally suited for high-speed bipolar mem­ ory chip select address decoding. The multiple input en­

ESD 138C

Contextual Info: jUN 15 199t P54/74FCT138/A/C P54/74PCT138/A/C HIGH SPEED 1-0F-8 DECODER FEATURES ESD protection exceeds 2000V Function, Pinout, and Drive Compatible with the FCT and F Logic Inputs and Outputs Interface Directly with TTL, NMOS, and CMOS Devices FCT-C speed at 4.7ns max. (Com'l)

circuit diagram of 1-8 demultiplexer design logi

Contextual Info: NATIONAL SEfUCOND CL06IC NSC1 b lE D 138A National Semiconductor FCT138A 1-of-8 Decoder/Demultiplexer General Description Features The ’FCT138A is a high-speed 1-of-8 decoder/demultiplex­ er. This device is ideally suited for high-speed bipolar mem­

CY74FCT138ATPC

Abstract: CY74FCT138ATQC CY74FCT138CTPC CY74FCT138CTQC CY74FCT138CTSOC
Contextual Info: CY54/74FCT138T ¿r C Y P R E S S l-of-8 Decoder Features • M atched rise and fall tim es • Function, pinout, and drive com patible w ith FCT and F logic • Fully com p atib le w ith TTL input and o u tpu t logic levels • FCT-C speed a t 5 .0 n s m ax. C om ’l

Contextual Info: CY54FCT138T, CY74FCT138T 1-OF-8 DECODERS SCCS013B – MAY 1994 – REVISED OCTOBER 2001 D D D D D D D 1 16 2 15 3 14 4 13 5 12 6 11 7 10 8 9 VCC O0 O1 O2 O3 O4 O5 O6 CY54FCT138T . . . L PACKAGE TOP VIEW A1 A0 NC VCC O0 D A0 A1 A2 E1 E2 E3 O7 GND A2 E1 NC

E16-1

Contextual Info: FAST CMOS 1-OF-8 DECODER WITH ENABLE Integrated Device Technology, Inc. IDT54/74FCT138T/AT/CT FEATURES: DESCRIPTION: • • • • The IDT54/74FCT138T/AT/CT are 1-of-8 decoders built using an advanced dual metal CMOS technology. The IDT54/ 74FCT138T/AT/CT accepts three binary weighted inputs A0,

Contextual Info: CY54FCT138T, CY74FCT138T 1-OF-8 DECODERS SCCS013A – MAY 1994 – REVISED OCTOBER 2001 D D D D D D D 1 16 2 15 3 14 4 13 5 12 6 11 7 10 8 9 VCC O0 O1 O2 O3 O4 O5 O6 CY54FCT138T . . . FK PACKAGE TOP VIEW A1 A0 NC VCC O0 D A0 A1 A2 E1 E2 E3 O7 GND A2 E1 NC

54FCT138T

Contextual Info: ^ CYPRESS CY54/74FCT138T l-of-8 Decoder Features • M atched rise and fall tim es • Function, pinout, and drive com patible w ith FCT and F logic • Fully com patible w ith T TL input and output logic levels • FCT-C speed at 5.0 n s m ax. C om ’l

Contextual Info: P54/74FCT138/A/C P54/74PCT138/A/C HIGH SPEED 1-0F-8 DECODER FEATURES ESD protection exceeds 2000V Function, Pinout, and Drive Compatible with the FCT and F Logic Inputs and Outputs Interface Directly with TTL, NMOS, and CMOS Devices FCT-C speed at 4.7ns max. (Com'l)

ic 74 138 DECODER

Contextual Info: FAST CMOS 1-0F-8 DECODER WITH ENABLE J m ï. , DESCRIPTION: FEATURES: - - - Std., A and C speed grades Low input and output leakage < 1|j A max. Extended commercial range of - 40°C to +85°C CMOS power levels True TTL input and output compatibility •

A115-A

Abstract: C101 CY54FCT138T CY74FCT138T
Contextual Info: CY54FCT138T, CY74FCT138T 1-OF-8 DECODERS SCCS013B – MAY 1994 – REVISED OCTOBER 2001 D D D D D D D 1 16 2 15 3 14 4 13 5 12 6 11 7 10 8 9 VCC O0 O1 O2 O3 O4 O5 O6 CY54FCT138T . . . L PACKAGE TOP VIEW A1 A0 NC VCC O0 D A0 A1 A2 E1 E2 E3 O7 GND A2 E1 NC

Contextual Info: P54/74FCT138T-P54/FCT138AT P54/74FCT138CT HIGH SPEED 1-0F-8 DECODER FEATURES • Power-oft disable feature Function, Pinout and Drive Compatible with the FCT and F Logic ■ Matched Rise and Fall times FCT-C speed at 4.7ns max. Com'l FCT-A speed at 5.8ns max. (Com'l)

Contextual Info: fax id: 7013 CY54/74FCT138T CYPRESS 1-of-8 Decoder Source current Features • Function, pinout, and drive compatible with FCT and F logic • FCT-C speed at 5.0 ns max. Com’I , FCT-A speed at 5.8 ns max. (Com’I) • Reduced V qh (typically = 3.3V) versions of equivalent

Contextual Info: CY54FCT138T, CY74FCT138T 1-OF-8 DECODERS SCCS013B – MAY 1994 – REVISED OCTOBER 2001 D D D D D D D 1 16 2 15 3 14 4 13 5 12 6 11 7 10 8 9 VCC O0 O1 O2 O3 O4 O5 O6 CY54FCT138T . . . L PACKAGE TOP VIEW A1 A0 NC VCC O0 D A0 A1 A2 E1 E2 E3 O7 GND A2 E1 NC

Contextual Info: FAST CMOS 1-0F-8 DECODER WITH ENABLE Integrated Device Technology» Inc. IDT54/74FCT138T/AT/CT FEATURES: DESCRIPTION: • • • • Th e ID T 5 4 /7 4 F C T 1 3 8 T /A T /C T are 1-of-8 decoders built using an advanced dual m etal C M O S technology. Th e ID T54/

E16-1

Contextual Info: FAST CMOS 1-OF-8 DECODER WITH ENABLE Integrated Device Technology, Inc. IDT54/74FCT138T/AT/CT FEATURES: DESCRIPTION: • • • • • The IDT54/74FCT138T/AT/CT are 1-of-8 decoders built using an advanced dual metal CMOS technology. The IDT54/ 74FCT138T/AT/CT accepts three binary weighted inputs A0,