MN4000 Search Results

MN4514BS

Abstract: MN4000B MN4514B
Contextual Info: M N4514B/M N4514BS CMOS Logic MN4000B Series M N4514B M N4514BS 4 - B i t L a t c h / L i n e D e c o d e r s High • Description The M N 4514B/S are d e co d e rs w h ic h c o n v e rt 4-bit in p u t to 16-bit o u tp u t w ith th e fu n c tio n o f la tc h in g th e in p u t d a ta .

ph 2n

Abstract: MN4541BS MC14541B MN4000B MN4541B 16-Stage Binary Counter
Contextual Info: PANASONIC INDL/ELEK -CIO bb dF | L.T3EÛSS 0005137 I _ CMOS Logic MN4000B Series 6932852 PANASONIC IND L *E LEC TRONIC M N 4 5 4 1 B / M N 4 5 4 D MN4541B/MN4541BS R 66C 0 5137 1 B D S Programmable Tim ers • Description ' P -1 The MN4541B/S aie programmable timers composed o f a

CI 4013

Abstract: 4013 ic PA 4013 MN4000B MN4502B CI 4013 BE
Contextual Info: PANASONIC INDL/ELEK -CIO bh CMOS Logic MN4000B Series ]>EJ b T 3 a f l S S 0Q0SQ73 □ - . , MN4502B/MN4502BS T*3-£l 66C 0 5 0 7 3 . 0 6 9 3 2 8 5 2 PANASONIC IN D L » E L E C T R O N IC MN4502B /MN4502BS Hex Strobed Inverting Buffers • D escription

l 05173

Abstract: 6932A MN4000B panasonic sa
Contextual Info: PANASONIC INDL/ELEK { I Q tb J e | bT3aflSE DOOSl?! □ | CMOS Logic MN4000B Series 6 9 3 2 6 5 2 PANASONIC INOL,ELECTRONIC M N 4 0 1 7 5 B /M . 66C 0 5 1 Î1 ' ' M N40175B/MN40175BS N 4 0 1 7 5 B S Quad D -T y p e F lip - F lo p s • Description

MN4019B

Abstract: CD4019B MN4000B cd40* quad 2-input
Contextual Info: PANASONIC I N D L / E L E K DE I - C I O ht, bT3aasa CMOS Logic MN4000B Series 6 9 3 2 8 5 2 PANASONIC IN D L * E L E C T R O N IC DDD^bl 5 | : MN4019B/MN4019BS .66C 0 4 9 61 OÍ T-67-11-51 MN4019BMN4019BS Quad 2-Input Multiplexers • Description P -3 T h e M N 4 0 1 9 B /S are quad 2-in p u t m u ltip lex ers c o m p o sed o f tw o

MN4584B

Abstract: MN4548B MC14584B MN4000B MN4584BS
Contextual Info: MN4584B/MN4584BS CMOS Logic MN4000B Series MN4584B MN4584BS Hex S c h m i tt T r i g g e r s • D e s c rip tio n |p -1 T h e M N45 8 4 B /S have h e x w a v efo rm sh ap in g circ u its. T h e y are used w h e n h igh noise im m u n ity is d e sire d , and as

16DI

Abstract: CD4512B MC14512B MN4000B MN4512B MN4512BS
Contextual Info: M N 4512 B /M N 4512 BS CMOS Logic MN4000B Series M N 4 5 1 2 B M N 4 5 1 2 B S 8-In put M u ltip le x e r s • Description P- 3 T h e M N 4 5 1 2 B /S a re 8 - c h a n n e l d a ta s e le c to r s w h ic h s e le c t d a ta in p u t s I 0 ~ I 7 b y s e le c t in p u t s (S 0 , S j , S2 ). A H ig h o n t h e

hy 214 A Display

Abstract: NS hy 214 A Display hy 214 hy 214-a MN4000B MN4517B MN4517BS 16 bit d ff
Contextual Info: M N4517B/M N4517BS CMOS Logic MN4000B Series M N4517B M N4517BS Dual 64-Bit S t a t i c Shif t R e g i s t e r s • Description P-3 The M N 4 5 1 7 B /S are d u al 64-bit static shift registers which have tw o in dep en d en t 64-bit registers. E ach register can be used in dep en d en tly since th ey have their

CD4516B

Abstract: MC14516B MN4000B MN4516B MN4516BS CD4516
Contextual Info: CMOS Logic MN4000B Series MN4516B/MN4516BS M N4516B / MN4516BS 4 - B i t B in ary U p /D o w n C o u n te r s • Description P- 3 T h e M N 4 5 1 6 B /S a re 4 -b it sy n c h ro n o u s u p /d o w n c o u n te rs . A n a p p ro p ria te value o f th e c o u n te r is p re s e tta b le b y s e ttin g d a ta

MN4000B

Abstract: MN4000BS
Contextual Info: PANASONIC IN D L/E LE K -CIO bb D Ë | b ^ E flS S CMOS Logic MN4000B Series 6932852 PANASONIC INOL*ELECTRONIC 0004^24 7 AAN4000B/MN4000BS 6C 0 Í9 2 4 D 7=V3-2/ MN4000B/MN40Ô0BS Dual 3-Input NOR G ates and Inverters • Description P-1 The M N 4000B /S are dual 3-input NOR gate and inverters.

MN4000B

Contextual Info: MN4526B/MN4526BS CMOS Logic MN4000B Series MN4526BMN4526BS Program m able 4 -B it B in ary C ounters • Description P- 3 The MN4526B/S are programmable 4-bit binary counters. Cascade N dividing action can be performed by the cascade feedback input without an external gate.

CD4075B

Abstract: MN4000B MN4075B MN4075BS
Contextual Info: CMOS Logic MN4000B Series MN4075B/MN4075BS MN4075B MN4075BS T rip le 3-Input OR G a te s • Description The M N 4075B /S aie positive 3-input O R gates an d have 3 circuits in a package. The o utp u ts are fully buffered to improve the propagation characteristics b etw ee n the input and o u tp u t w hich are affected

D4071B

Contextual Info: CMOS Logic MN4000B Series M N4071B/M N4071BS MN4071B MN4071BS Quad 2-Input OR Gates • Description P -1 T h e M N 4 0 7 1 B /S are p o sitiv e 2 -in p u t O R g a te s a n d h ave 4 circ u its in a p ackage. T h e o u tp u ts are fu lly b u ffe re d to im p ro v e th e p ro p a g a tio n

Contextual Info: CMOS Logic MN4000B Series MN4512B/M N4512BS MN4512B MN4512BS 8'Input M u l t i p l e x e r s • D escription P -3 T h e M N 4 5 1 2 B /S are 8 -c h a n n el d a ta sele c to rs w h ich sele c t da ta in p u ts I0 ~ I7 b y select in p u ts (Sq, S j , S2 ). A H igh o n th e

MN7130

Abstract: MN373
Contextual Info: Track-Hold Amplifiers Specified Temp Range °C Aperture Jitter (psec) Droop Rale (M Power DIP Package Hi-Rel Option DESC SMD (5962) Page Na MN379 Oto +70 - 5 5 to +125 1 ±500 1575 24 Pin Yes (Note 2) 8-35 +1. ±1V MN4000 Oto +70 -5 5 to +125 50 ±200 750

MN4016B

Abstract: MN4066B 4066b motorola MN4066BS CD4066B MC14066B MN4000B 15VOR
Contextual Info: CMOS Logic MN4000B Series MN4066B/MN4066BS MN4066B /MN4066BS Quad Analog S w itch es • Description P- 1 T he M N 4 0 6 6 B/S have 4 independent analog switches. A High on the enable input establishes a low im pedance state O N stage between input and output o f the switch. A L o w establishes a

Motorola MC14070B

Abstract: cd4070 ic MN4070B CD4070B MC14070B MN4000B
Contextual Info: CMOS Logic MN4000B Series MN4030B/S. MN4070B/S MN4030B/S, MN4070B/S Quad E x cl us iv e - O R Gates • Description P -1 T h e M N 4 0 3 0 B /S an d M N 4 0 7 0 B /S are E X C L U S IV E -O R gates a n d have 4 c irc u its in a p ack ag e. T he o u tp u ts are fu lly b u ffe re d to im p ro v e th e p ro p a g a tio n

Contextual Info: PANASONIC INDL/ELEK -CIO bb d F | L.T3 EÛSS 0005137 I _ CM O S Logic MN4000B Series 6932852 PANASONIC IND L *E LEC T R O N IC D MN4541B/MN4541BS R 66C 0 5137 D M N 4 5 4 1 B / M N 4 5 4 1 B S Programmable Tim ers • Description ' P -1 The MN4541B/S aie programmable timers composed o f a

Contextual Info: N PANASONIC INDL/ELEK -CIO bb I D E ^ b ^ 3 5 0 5 2 CM O S Loaic MN4000B Series 6932852 PANASONIC INDL*ELECTRÛNIC MN4021BMN4021BS 0004'ibfl 5 I , ; ' MN4021B/MN4021BS ' 66C 04968 D 8 -B it Static Shift Registers • Description P -3 The M N 4021B/S are 8-bit static shift registers composed o f 8

Contextual Info: PANASONIC INDL/ELEK -CIO bb I DE.| b^SflSE DD04T4S H C M O S Loqic MN4000B Series ^ 6932852 PANASONIC INDL*ELECTRONIC ! - . MN4015B/MN4015BS 0 T->4<t'Of-c6 66C 04945 M N 40 15 B M N 401 5B S ' Dual 4 -Stage Static Shift Registers • Description T he M N 4015B/S axe dual 4-bit static shift registers,

Contextual Info: PANASONIC INPL/ELEK -ÍIC3- hi » Ê J tT3EflS5 DDOSD1S E CMOS Logic MN4000B Series r , MN4046B/MN404ÓBS 66C 0 5 01 2 D T-So- 17 6 9 32 8 5 2 PANASONIC IN D L*ELEC T R O N IC MN4046B / MN4046BS P h ase-L ocked Loops • Description P- 3 T his M N 4046B /S a te phase-locked lo o p circuits com posed o f

Contextual Info: PANASONIC INDL/ELEK -CIO d E | LT35Û 52 000500e] 5 J~_ MN4044B/MN4044BS 66C 0 5009 D 01-/5 CMOS Logic MN4000B Series 6932852 PANASONIC INDLtELECTRONIC MN4044B / MN4044BS Quad R /S Latches • Description P- 3 The MN4044B/S have built-in quad independent R/S flip-flops.

MN4017B

Abstract: MN4017BS MC14017B equivalent MN4000B CD4017B MC14017B cpj 2 CD4017B equivalent
Contextual Info: CMOS Logic MN4000B Series M N 4 0 1 7 B /M N 4 0 1 7 B S MN4017B MN4017BS 5 -S ta g e Johnson Counters • Description The M N 4 0 1 7 B /S a ie 5-stage Joh n son decade cou n ters c o n ­ structed w ith five D -typ e flip -flops. One o f the o u tp u ts O g ~

Contextual Info: CMOS Logic MN4000B Series MN40161B/MN40161BS MN40161B MN40161BS 4 - B it Binary Counters • D escription P- 3 T h e M N 4 0 1 6 1 B /S a re s y n c h ro n o u s p ro g ra m m a b le 4 -b it b in a ry c o u n te rs. T h e re set fu n c tio n s a sy n c h ro n o u s ly , causing all flip -flo p o u tp u ts