MT48LC2M8A1 Search Results

obsolete micron SDRAM

Abstract: 44-PIN MT48LC2M8A1 16MSDR MT48LC2M8A1TG-10S
Contextual Info: OBSOLETE 16 MEG: x4, x8 SDRAM MT48LC4M4A1/A2 S - 2 Meg x 4 x 2 banks MT48LC2M8A1/A2 S - 1 Meg x 8 x 2 banks SYNCHRONOUS DRAM For the latest data sheet revisions, please refer to the Micron Web site: www.micron.com/mti/msp/html/datasheet.html FEATURES PIN ASSIGNMENT Top View

MT48LC2M8A1

Contextual Info: PRELIMINARY MT48LC4M4A1 S 4 Meg x 4 MT48LC2M8A1 S (2 Meg x 8) SYNCHRONOUS DRAM FEATURES PIN ASSIGNMENT (TOP VIEW) • Fully synchronous; all signals registered on positive edge of system clock • Internal pipelined operation; column address can be changed every clock cycle

Contextual Info: PRELIMINARY MT48LC4M4A1 S 4 Meg x 4 MT48LC2M8A1 S (2 Meg x 8) FEATURES PIN ASSIGNMENT (TOP VIEW) • Fully synchronous; all signals registered on positive edge of system clock • Internal pipelined operation; column address can be changed every clock cycle

N41A

Contextual Info: 16 MEG: x4, x8 SDRAM MICRON I TECHNOLOGY, INC. MT48LC4M4A1 /A2 S - 2 Meg x 4 x 2 banks MT48LC2M8A1 /A2 S -1 Meg x 8 x 2 banks SYNCHRONOUS DRAM For the latest data sheet revisions, please refer to the Micron Web site: www.micron.com/mti/msp/html/datasheet.html

44-PIN

Abstract: MT48LC2M8A1
Contextual Info: 16 MEG: x4, x8 SDRAM MT48LC4M4A1/A2 S - 2 Meg x 4 x 2 banks MT48LC2M8A1/A2 S - 1 Meg x 8 x 2 banks SYNCHRONOUS DRAM For the latest data sheet revisions, please refer to the Micron Web site: www.micron.com/mti/msp/html/datasheet.html FEATURES PIN ASSIGNMENT Top View

MARKING code CG QU

Contextual Info: OBSOLETE 16 MEG: x4, x8 SDRAM MICRON I TECHNOLOGY, INC. MT48LC4M4A1 /A2 S - 2 Meg x 4 x 2 banks MT48LC2M8A1 /A2 S -1 Meg x 8 x 2 banks SYNCHRONOUS DRAM F or the latest data sheet revisions, please refer to the Micron Web site: www.m icron.com/m ti/msp/htm l/datasheet.htm l

BA 4916

Abstract: 4416 dram 44-PIN MT48LC2M8A1
Contextual Info: 16 MEG: x4, x8 SDRAM SYNCHRONOUS DRAM MT48LC4M4A1/A2 S - 2 Meg x 4 x 2 banks MT48LC2M8A1/A2 S - 1 Meg x 8 x 2 banks For the latest data sheet revisions, please refer to the Micron Web site: www.micron.com/datasheets. FEATURES PIN ASSIGNMENT Top View • PC100-compliant; includes CONCURRENT AUTO

Contextual Info: PRELIMINARY MICRON I 16 M E G :x4,x8 SDRAM TECHNOLOGY, INC. C V K I P U I P H K in i IQ o Y N U h n U N U U b MT48LC4M4A1 S 4 Meg x 4 MT48LC2M8A1 S ( 2 M e g x 8 ) DRAM FEATURES PIN ASSIGNMENT (TOP VIEW) • Fully synchronous; all signals registered on positive

Contextual Info: PRELIMINARY 16 MEG: x4, x8 SDRAM MICRON I TECHNOLOGY, INC. SYNCHRONOUS DRAM MT48LC4M4A1 /A2 S - 2 Meg x 4 x 2 banks MT48LC2M8A1 /A2 S -1 Meg x 8 x 2 banks FEATURES • PCIOO-compliant functionality • Fully synchronous; all signals registered on positive

AN1766

Abstract: MCF5307 TMS664814-10
Contextual Info: Order this document by AN1766/D REV 2.0 Semiconductor Products Sector Communications and Advanced Consumer Technologies Group AN1766 Application Note Using the SDRAM Controller on the MCF5307 ColdFire¨ Integrated Microprocessor Dave Lapham Applications Engineering, Imaging & Entertainment Solutions

Contextual Info: ADVANCE 2, 4 MEG X 64 SDRAM DIMMs MICRON I TECHNOLOGY, INC. SYNCHRONOUS DRAM MODULE MT8LSD T 264A MT16LSD(T)464A FEATURES PIN ASSIGNMENT (Front View) 168-Pin DIMM • JEDEC-standard 168-pin, dual in-line memory module (DIMM) • Utilizes 83 and 100 MHz SDRAM components

Contextual Info: ADVANCED 4 MEG X 32 SDRAM DIMM |U |IC RO N SDRAM MODULE MT8LSD T 432U FEATURES PIN ASSIGNMENT (Front View) 100-Pin DIMM • JEDEC-standard pinout in a 100-pin, dual in-line memory module (DIMM) • 16MB (4 Meg x 32) • Utilizes 100 MHz SDRAM components • Single +3.3V ±0.3V power supply

AN1766

Abstract: MCF5307 TMS664814-10 MT48LC2M8A-10
Contextual Info: Back Order this document by AN1766/D REV 1.0 Consumer Systems Group Communications and Advanced Consumer Technologies Group AN1766 Application Note Using the SDRAM Controller on the MCF5307 ColdFire Integrated Microprocessor Dave Lapham Applications Engineering, Imaging Systems Division

sekisui 5760

Abstract: sis950 SiS chipset 486 SEAGATE st51080n Bt848KPF KSV884T4A1A-07 lad1 5vdc SiS chipset SiS301 kingmax usb flash drive
Contextual Info: SiS540 Super 7 2D/3D Ultra-AGPTM Single Chipset Content Figure .vi Table. vii

VG264265B

Abstract: TC5117405CSJ hyundai cross reference guide TC51V16160 Micron 4MX32 EDO SIMM dram cross reference cross reference tc5117800cft SAMSUNG Cross Reference
Contextual Info: Cross Reference Guide 1.3. Cross Reference Guide 1.3.1. Cross Reference of 256kxl6 DRAM Vendors\Configuration VIS Hitachi Hyundai Micron Motorola NEC Samsung Toshiba TI 256kxl6, 5V, EDO VG264265B HM514265D HY514264B MT4C16270 N/A PD4244265LE KM416C254D TC5144265D

marking code MOG 8

Contextual Info: ADVANCE 2, 4 MEG X 72 SDRAM DIMMs m ic r o n I TEC H N O LO G Y, M C. SYNCHRONOUS DRAM MODULE MT9LSD T 272A MT 18LSD(T)472A FEATURES PIN ASSIGNMENT (Front View) 168-Pin DIMM • JEDEC-standard 168-pin, dual in-line memory module (DIMM) • Utilizes 83 and 100 MHz SDRAM components

GKE1

Abstract: EC Bus
Contextual Info: M IC R OTECtfJOLNOGY,INC. 2 4 MEGx 64 SDRAM DIMMs I SYNCHRONOUS DRAM MODULE MT8LSD T 264A MT16LSD(T)464A FEATURES PIN ASSIGNMENT (Front View) • JEDEC-standard 168-pin, dual in-line memory module (DIMM) • PClOO-compliant functionality (-10A) • Utilizes 83 MHz, 100 MHz and 125 MHz SDRAM

marking code 17W

Abstract: ZM marking
Contextual Info: OBSOLETE 2, 4 MEG X 72 SDRAM DIMMs MICRON I TECHNOLOGY, INC. MT9LSDT272A, MT18LSDT472A SYNCHRONOUS DRAM MODULE For the latest data sheet revisions, please refer to the Micron Web site: www.micron.com/mti/msp/html/datasheet.html FEATURES PIN ASSIGNMENT Front View

MT48LC2M8A1-8B

Abstract: 1F27FC04
Contextual Info: Freescale Semiconductor Application Note AN2066/D Rev. 1.5, 11/2001 MPC8xx SDRAM Interface Freescale Semiconductor, Inc. Heinz Wrobel Freescale GmbH, Munich Janet Snyder NCSD Applications, Austin Part I Introduction In the long term, Synchronous DRAMs SDRAM offer system designers at least two

MT8LSDT264HG-662C1

Abstract: MT8LSDT264HG-662 SO-DIMM 144-pin
Contextual Info: OBSOLETE 2 MEG x 64 SDRAM SODIMM MT8LSDT264H SMALL-OUTLINE SDRAM MODULE For the latest data sheet revisions, please refer to the Micron Web site: www.micron.com/mti/msp/html/datasheet.html FEATURES PIN ASSIGNMENT Front View • JEDEC-standard 144-pin, small-outline, dual in-line

zm05

Abstract: micron power resistor zm05 16Mb SDRAM MICRON
Contextual Info: OBSOLETE 4 MEG x 32 SDRAM DIMM MT8LSDT432U SYNCHRONOUS DRAM MODULE For the latest data sheet revisions, please refer to the Micron Web site: www.micron.com/mti/msp/html/datasheet.html FEATURES PIN ASSIGNMENT Front View 100-Pin DIMM • JEDEC-standard pinout in a 100-pin, dual in-line

16Mb SDRAM

Abstract: MT18LSDT472A
Contextual Info: OBSOLETE 2, 4 MEG x 72 SDRAM DIMMs MT9LSDT272A, MT18LSDT472A SYNCHRONOUS DRAM MODULE For the latest data sheet revisions, please refer to the Micron Web site: www.micron.com/mti/msp/html/datasheet.html FEATURES PIN ASSIGNMENT Front View • PC100-compliant; includes CONCURRENT AUTO

Contextual Info: 2 MEG X 32 SDRAM DIMM MICRON I TECHNOLOGY, INC. MT4LSDT232U SYNCHRONOUS DRAM MODULE For the latest data sheet revisions, please refer to the Micron Web site: www.micron.com/mti/msp/html/datasheet.html FEATURES PIN ASSIGNMENT Front View • JED EC pinout in a 100-pin, dual in-line m em ory

Contextual Info: ADVANCE 2, 4 MEG X 72 SDRAM DIMMs MICRON I TECHNOLOGY, INC. SYNCHRONOUS DRAM MODULE MT9LSD T 272A MT18LSD(T)472A FEATURES PIN ASSIGNMENT (Front View) 168-Pin DIMM • JEDEC-standard 168-pin, dual in-line memory module (DIMM) • Utilizes 83 and 100 MHz SDRAM components