DDR2-667
Abstract: PC2-5300 SSTL-18
Text: NT256T64UH4A1FY 256MB: 32M x 64 Unbuffered DDR2 SDRAM DIMM 240pin Unbuffered DDR2 SDRAM MODULE Based on 32Mx16 DDR2 SDRAM Features • JEDEC Standard 240-pin Dual In-Line Memory Module • 32Mx64 DDR2 Unbuffered DIMM based on 32Mx16 DDR2 SDRAM • Performance:
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Original
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PDF
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NT256T64UH4A1FY
256MB:
240pin
32Mx16
240-pin
32Mx64
84-ball
DDR2-667
PC2-5300
SSTL-18
|
Untitled
Abstract: No abstract text available
Text: NT256T64UH4A1FY 256MB: 32M x 64 Unbuffered DDR2 SDRAM DIMM 240pin Unbuffered DDR2 SDRAM MODULE Based on 32Mx16 DDR2 SDRAM Features • JEDEC Standard 240-pin Dual In-Line Memory Module • 32Mx64 DDR2 Unbuffered DIMM based on 32Mx16 DDR2 SDRAM • Performance:
|
Original
|
PDF
|
NT256T64UH4A1FY
256MB:
240pin
32Mx16
240-pin
32Mx64
PC2-5300
333MHz
SSTL-18
|
Untitled
Abstract: No abstract text available
Text: NT256T64UH4A1FY 256MB: 32M x 64 Unbuffered DDR2 SDRAM DIMM 240pin Unbuffered DDR2 SDRAM MODULE Based on 32Mx16 DDR2 SDRAM Features • JEDEC Standard 240-pin Dual In-Line Memory Module • 32Mx64 DDR2 Unbuffered DIMM based on 32Mx16 DDR2 SDRAM • Performance:
|
Original
|
PDF
|
NT256T64UH4A1FY
256MB:
240pin
32Mx16
240-pin
32Mx64
PC2-5300
333MHz
SSTL-18
|
Untitled
Abstract: No abstract text available
Text: NT256T64UH4A1FY 256MB: 32M x 64 Unbuffered DDR2 SDRAM DIMM 240pin Unbuffered DDR2 SDRAM MODULE Based on 32Mx16 DDR2 SDRAM Features • Address and control signals are fully synchronous to positive • JEDEC Standard 240-pin Dual In-Line Memory Module clock edge
|
Original
|
PDF
|
NT256T64UH4A1FY
256MB:
240pin
32Mx16
240-pin
32Mx64
PC2-5300
|
Untitled
Abstract: No abstract text available
Text: NT256T64UH4A1FY 256MB: 32M x 64 Unbuffered DDR2 SDRAM DIMM 240pin Unbuffered DDR2 SDRAM MODULE Based on 32Mx16 DDR2 SDRAM Features clock edge • JEDEC Standard 240-pin Dual In-Line Memory Module • Write Latency = Read Latency - 1 • 32Mx64 DDR2 Unbuffered DIMM based on 32Mx16 DDR2
|
Original
|
PDF
|
NT256T64UH4A1FY
256MB:
240pin
32Mx16
240-pin
32Mx64
PC2-5300
|