NOVEMBER1996 Search Results

SN54LVT245B

Abstract: SN74LVT245B
Contextual Info: SN54LVT245B, SN74LVT245B 3.3-V ABT OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS SCES004A – JANUARY 1995 – REVISED NOVEMBER1996 D D D D D 1 20 2 19 3 18 4 17 5 16 6 15 7 14 8 13 9 12 10 11 VCC OE B1 B2 B3 B4 B5 B6 B7 B8 SN54LVT245B . . . FK PACKAGE TOP VIEW

SN75LVDS81

Abstract: DS90C581 DTS2070C HP8656B HP8665A SN75LVDS82 SN75LVDS86 SLLS258A
Contextual Info: SN75LVDS81 FLATLINK TRANSMITTER SLLS258A – NOVEMBER1996 – REVISED JANUARY 1997 D D D D D D D D D D D D D DGG PACKAGE TOP VIEW 28:4 Data Channel Compression at up to 227.5 Million Bytes per Second Throughput Suited for SVGA, XGA, or SXGA Display Data Transmission From Controller to

Contextual Info: m V J iU H a r r i s H S E M I C O N D U C T O R M ADVANCE INFORMATION November1996 4 5 6 Description Fully Buffered Inputs and Outputs Ay = +1 • Routes A ny Input Channel to Any Output Channel • Switches Standard and High Resolution Video Signals • Serial or Parallel Digital Interface

sg ZENER DIODE

Abstract: transistor SG 14 AIR FLOW DETECTOR CIRCUIT DIAGRAM diode sg 03
Contextual Info: S H a rr* CA1391, CA1394 November1996 TV Horizontal Processors Features • Description CA 1391E-Positive Horizontal Sawtooth Input • CA1394E - Negative Horizontal Sawtooth Input • Internal Shunt Regulator • Unear Balanced Phase Detector • Preset Hold Control Capability

circuit inter CV 203

Contextual Info: DS 3L IM -SN DS3/STS-1 Line Interface Module NRZ Clock/Data Output TXC-201 53D, TXC-201 53G DATA SHEE T FEATURES DESCRIPTION • Complete B3ZS analog to NRZ digital DS3/ STS-1 line interface unit in a compact 2.6 square inch, 50-pin DIP module • Single +5V power supply

DIODE IT4

Abstract: STTA506D AN877 STTB506D DIODE T5 Diode d4 switching transistor
Contextual Info: AN877 APPLICATION NOTE TURBOSWITCH IN AN ASYNCHRONOUS MOTOR DRIVE The basic schematic of an asynchronous motor drive is shown in Figure 1 Figure 1. Basic schematic of an asynchronous motor drive. Va D1 T1 IT1 T2 D2 T3 D3 ID1 IL T5 T4 IT4 ID4 D4 T6 D5 D6

Contextual Info: M O SEL VITELIC V53C511816500 1 M X 1 6 EDO PAGE MODE CMOS DYNAMIC RAM HIGH PERFORMANCE 50 60 70 Max. RAS Access Time, Orac 50 ns 60 ns 70 ns Max. Column Address Access Time, ^ aa) 25 ns 30 ns 35 ns Min. Extended Data Out Page Mode Cycle Time, (Vc) 20 ns

TDA9309

Contextual Info: TDA9309 VERTICAL DEFLECTION BOOSTER FEATURES SUMMARY • POWER AMPLIFIER Figure 1. Package ■ FLYBACK GENERATOR ■ THERMAL PROTECTION ■ OUTPUT CURRENT UP TO 2.0APP ■ FLYBACK VOLTAGE UP TO 70V on Pin 5 ■ SUITABLE FOR DC COUPLING APPLICATION c u d

TDA9309

Abstract: C901
Contextual Info: TDA9309 VERTICAL DEFLECTION BOOSTER FEATURES SUMMARY • POWER AMPLIFIER ■ FLYBACK GENERATOR ■ THERMAL PROTECTION ■ OUTPUT CURRENT UP TO 2.0APP ■ FLYBACK VOLTAGE UP TO 70V on Pin 5 ■ SUITABLE FOR DC COUPLING APPLICATION Figure 1. Package DESCRIPTION

SN75LVDS81

Abstract: SLLS258 7A1P
Contextual Info: SN75LVDS81 FLATLINK TRANSMITTER SLLS258 - N0VEMBER1996 - REVISED JANUARY 1997 D Û Û PACKAGE 2 8 : 4 D a t a C h a n n e l C o m p r e s s i o n a t u p to TOP VIEW 2 2 7 . 5 M i l l i on B y t e s p e r S e c o n d T h r o u g h p u t • V CC [ 1 D5 [ 2