SN74AHC32 Search Results

Contextual Info: SN54AHC32, SN74AHC32 QUADRUPLE 2-INPUT POSITIVE-OR GATES SCLS247H – OCTOBER 1995 – REVISED JULY 2003 D Operating Range 2-V to 5.5-V VCC Latch-Up Performance Exceeds 250 mA Per JESD 17 13 3 12 4 11 5 10 6 9 7 8 1B 1Y 2A 2B 2Y 1 14 1B 1A NC VCC 4B VCC VCC

Contextual Info: SN74AHC32-EP QUADRUPLE 2-INPUT POSITIVE-OR GATE SCLS488 – JUNE 2003 D D D D D D D D D D OR PW PACKAGE TOP VIEW Controlled Baseline – One Assembly/Test Site, One Fabrication Site Extended Temperature Performance of –55°C to 125°C Enhanced Diminishing Manufacturing

Contextual Info: SN54AHC32, SN74AHC32 QUADRUPLE 2ĆINPUT POSITIVEĆOR GATES SCLS247H − OCTOBER 1995 − REVISED JULY 2003 D Operating Range 2-V to 5.5-V VCC D Latch-Up Performance Exceeds 250 mA Per D ESD Protection Exceeds JESD 22 − 2000-V Human-Body Model A114-A − 200-V Machine Model (A115-A)

A115-A

Abstract: C101 SN54AHC32 SN74AHC32
Contextual Info: SN54AHC32, SN74AHC32 QUADRUPLE 2-INPUT POSITIVE-OR GATES SCLS247H – OCTOBER 1995 – REVISED JULY 2003 D Operating Range 2-V to 5.5-V VCC Latch-Up Performance Exceeds 250 mA Per JESD 17 13 3 12 4 11 5 10 6 9 7 8 1B 1Y 2A 2B 2Y 1 14 1B 1A NC VCC 4B VCC VCC

Contextual Info: SN54AHC32, SN74AHC32 QUADRUPLE 2-INPUT POSITIVE-OR GATES SCLS247H − OCTOBER 1995 − REVISED JULY 2003 D Operating Range 2-V to 5.5-V VCC D Latch-Up Performance Exceeds 250 mA Per D ESD Protection Exceeds JESD 22 − 2000-V Human-Body Model A114-A − 200-V Machine Model (A115-A)

SN74AHC32D

Contextual Info: SN54AHC32, SN74AHC32 QUADRUPLE 2-INPUT POSITIVE-OR GATES SCLS247H – OCTOBER 1995 – REVISED JULY 2003 D Operating Range 2-V to 5.5-V VCC Latch-Up Performance Exceeds 250 mA Per JESD 17 13 3 12 4 11 5 10 6 9 7 8 1B 1Y 2A 2B 2Y 1 14 1B 1A NC VCC 4B VCC VCC

Contextual Info: SN74AHC32-EP QUADRUPLE 2-INPUT POSITIVE-OR GATE SCLS488 – JUNE 2003 D D D D D D D D D D OR PW PACKAGE TOP VIEW Controlled Baseline – One Assembly/Test Site, One Fabrication Site Extended Temperature Performance of –55°C to 125°C Enhanced Diminishing Manufacturing

SN74AHC32Q-Q1

Abstract: AEC-Q100 Q100 SN74AHC32Q SN74AHC32QDRQ1 SN74AHC32QPWRQ1
Contextual Info: SN74AHC32Q-Q1 QUADRUPLE 2-INPUT POSITIVE-OR GATE SGDS019 – FEBRUARY 2002 D D D D D D D D OR PW PACKAGE TOP VIEW Qualification in Accordance With AEC-Q100† Qualified for Automotive Applications Customer-Specific Configuration Control Can Be Supported Along With

Contextual Info: SN74AHC32QĆQ1 QUADRUPLE 2ĆINPUT POSITIVEĆOR GATE SGDS019A − FEBRUARY 2002 − REVISED APRIL 2008 D Qualified for Automotive Applications D EPIC Enhanced-Performance Implanted D OR PW PACKAGE (TOP VIEW CMOS) Process 1A 1B 1Y 2A 2B 2Y GND D Operating Range 2-V to 5.5-V VCC

Contextual Info: SN54AHC32, SN74AHC32 QUADRUPLE 2-INPUT POSITIVE-OR GATES SCLS247H − OCTOBER 1995 − REVISED JULY 2003 D Operating Range 2-V to 5.5-V VCC D Latch-Up Performance Exceeds 250 mA Per D ESD Protection Exceeds JESD 22 − 2000-V Human-Body Model A114-A − 200-V Machine Model (A115-A)

SN74AHC32

Abstract: SN74AHC32MDREP SN74AHC32MPWREP
Contextual Info: SN74AHC32-EP QUADRUPLE 2-INPUT POSITIVE-OR GATE SCLS488 – JUNE 2003 D D D D D D D D D D OR PW PACKAGE TOP VIEW Controlled Baseline – One Assembly/Test Site, One Fabrication Site Extended Temperature Performance of –55°C to 125°C Enhanced Diminishing Manufacturing

Contextual Info: SN54AHC32, SN74AHC32 QUADRUPLE 2ĆINPUT POSITIVEĆOR GATES SCLS247H − OCTOBER 1995 − REVISED JULY 2003 D Operating Range 2-V to 5.5-V VCC D Latch-Up Performance Exceeds 250 mA Per D ESD Protection Exceeds JESD 22 − 2000-V Human-Body Model A114-A − 200-V Machine Model (A115-A)

SN54AHC32

Abstract: SN74AHC32
Contextual Info: SN54AHC32, SN74AHC32 QUADRUPLE 2-INPUT POSITIVE-OR GATES SCLS247A – OCTOBER 1995 – REVISED MARCH 1996 D D D SN54AHC32 . . . J OR W PACKAGE SN74AHC32 . . . D, DB, N, OR PW PACKAGE TOP VIEW Operating Range 2-V to 5.5-V VCC EPIC  (Enhanced-Performance Implanted

ha32 tssop

Abstract: SN74AHC32DBR A115-A C101 SN54AHC32 SN74AHC32
Contextual Info: SN54AHC32, SN74AHC32 QUADRUPLE 2-INPUT POSITIVE-OR GATES SCLS247H – OCTOBER 1995 – REVISED JULY 2003 D Operating Range 2-V to 5.5-V VCC Latch-Up Performance Exceeds 250 mA Per JESD 17 13 3 12 4 11 5 10 6 9 7 8 1B 1Y 2A 2B 2Y 1 14 1B 1A NC VCC 4B VCC VCC

Contextual Info: SN74AHC32-EP QUADRUPLE 2-INPUT POSITIVE-OR GATE SCLS488 – JUNE 2003 D D D D D D D D D D OR PW PACKAGE TOP VIEW Controlled Baseline – One Assembly/Test Site, One Fabrication Site Extended Temperature Performance of –55°C to 125°C Enhanced Diminishing Manufacturing

AEC-Q100

Abstract: Q100 SN74AHC32Q SN74AHC32QDRQ1 SN74AHC32QPWRQ1 SN74AHC32Q-Q1 ha32q
Contextual Info: SN74AHC32Q-Q1 QUADRUPLE 2-INPUT POSITIVE-OR GATE SGDS019 – FEBRUARY 2002 D D D D D D D D OR PW PACKAGE TOP VIEW Qualification in Accordance With AEC-Q100† Qualified for Automotive Applications Customer-Specific Configuration Control Can Be Supported Along With

Contextual Info: SN54AHC32, SN74AHC32 QUADRUPLE 2-INPUT POSITIVE-OR GATES SCLS247H − OCTOBER 1995 − REVISED JULY 2003 D Operating Range 2-V to 5.5-V VCC D Latch-Up Performance Exceeds 250 mA Per D ESD Protection Exceeds JESD 22 − 2000-V Human-Body Model A114-A − 200-V Machine Model (A115-A)

Contextual Info: SN74AHC32QĆQ1 QUADRUPLE 2ĆINPUT POSITIVEĆOR GATE SGDS019A − FEBRUARY 2002 − REVISED APRIL 2008 D OR PW PACKAGE TOP VIEW D Qualified for Automotive Applications D EPIC (Enhanced-Performance Implanted CMOS) Process 1A 1B 1Y 2A 2B 2Y GND D Operating Range 2-V to 5.5-V VCC

Contextual Info: SN54AHC32, SN74AHC32 QUADRUPLE 2-INPUT POSITIVE-OR GATES _ S C L S 2 4 7 A -O CTO BE R 1 9 9 5 - REVISED MARCH 1996 • Operating Range 2-V to 5.5-V V cc • EPIC Enhanced-Performance Implanted CMOS Process • High Latch-Up Immunity Exceeds 250 mA

SN74AHC32

Contextual Info: SN74AHC32 QUADRUPLE 2-lNPUT POSITIVE-OR GATE S C L S 2 4 7 -O CTO BER 1995 D, DB, N, OR PW PACKAGE TOP VIEW Operating Range: 2-V to 5.5-V Vqc EPIC (Enhanced-Performance Implanted CMOS) Process High Latch-Up Immunity Exceeds 300 mA Per JEDEC Standard JESD-17

SN54AHC32

Abstract: SN74AHC32
Contextual Info: SN54AHC32, SN74AHC32 QUADRUPLE 2-INPUT POSITIVE-OR GATES SCLS247A - OCTOBER 1995 - REVISED MARCH 1996 Operating Range 2-V to 5.5-V V qc • EPIC Enhanced-Performance Implanted CMOS Process • High Latch-Up Immunity Exceeds 250 mA Per JEDEC Standard JESD-17

SN74AHC32Q

Abstract: SN74AHC32QDRG4Q1 SN74AHC32QDRQ1 SN74AHC32QPWRG4Q1 SN74AHC32QPWRQ1
Contextual Info: SN74AHC32QĆQ1 QUADRUPLE 2ĆINPUT POSITIVEĆOR GATE SGDS019A − FEBRUARY 2002 − REVISED APRIL 2008 D Qualified for Automotive Applications D EPIC Enhanced-Performance Implanted D OR PW PACKAGE (TOP VIEW CMOS) Process 1A 1B 1Y 2A 2B 2Y GND D Operating Range 2-V to 5.5-V VCC

ha32 tssop

Abstract: SN74AHC32 A115-A C101 SN54AHC32
Contextual Info: SN54AHC32, SN74AHC32 QUADRUPLE 2-INPUT POSITIVE-OR GATES SCLS247H – OCTOBER 1995 – REVISED JULY 2003 D Operating Range 2-V to 5.5-V VCC Latch-Up Performance Exceeds 250 mA Per JESD 17 13 3 12 4 11 5 10 6 9 7 8 1B 1Y 2A 2B 2Y 1 14 1B 1A NC VCC 4B VCC VCC

SN74AHC32

Abstract: SN74AHC32MDREP SN74AHC32MPWREP
Contextual Info: SN74AHC32-EP QUADRUPLE 2-INPUT POSITIVE-OR GATE SCLS488 – JUNE 2003 D D D D D D D D D D OR PW PACKAGE TOP VIEW Controlled Baseline – One Assembly/Test Site, One Fabrication Site Extended Temperature Performance of –55°C to 125°C Enhanced Diminishing Manufacturing