SN74AHCT1G00 Search Results

Contextual Info: SN74AHCT1G00 SINGLE 2-INPUT POSITIVE-NAND GATE SCLS316M – MARCH 1996 – REVISED JANUARY 2003 D D D D D D D DBV OR DCK PACKAGE TOP VIEW Operating Range of 4.5 V to 5.5 V Max tpd of 7.1 ns at 5 V Low Power Consumption, 10-µA Max ICC ±8-mA Output Drive at 5 V

Contextual Info: SN74AHCT1G00 SINGLE 2-INPUT POSITIVE-NAND GATE SCLS316M – MARCH 1996 – REVISED JANUARY 2003 D D D D D D D DBV OR DCK PACKAGE TOP VIEW Operating Range of 4.5 V to 5.5 V Max tpd of 7.1 ns at 5 V Low Power Consumption, 10-µA Max ICC ±8-mA Output Drive at 5 V

A115-A

Abstract: C101 SN74AHCT1G00 SN74AHCT1G00DBVR
Contextual Info: SN74AHCT1G00 SINGLE 2-INPUT POSITIVE-NAND GATE SCLS316M – MARCH 1996 – REVISED JANUARY 2003 D D D D D D D DBV OR DCK PACKAGE TOP VIEW Operating Range of 4.5 V to 5.5 V Max tpd of 7.1 ns at 5 V Low Power Consumption, 10-µA Max ICC ±8-mA Output Drive at 5 V

A115-A

Abstract: C101 SN74AHCT1G00 SN74AHCT1G00DBVR
Contextual Info: SN74AHCT1G00 SINGLE 2-INPUT POSITIVE-NAND GATE SCLS316M – MARCH 1996 – REVISED JANUARY 2003 D D D D D D D DBV OR DCK PACKAGE TOP VIEW Operating Range of 4.5 V to 5.5 V Max tpd of 7.1 ns at 5 V Low Power Consumption, 10-µA Max ICC ±8-mA Output Drive at 5 V

Contextual Info: SN74AHCT1G00 SINGLE 2-INPUT POSITIVE-NAND GATE SCLS316M – MARCH 1996 – REVISED JANUARY 2003 D D D D D D D DBV OR DCK PACKAGE TOP VIEW Operating Range of 4.5 V to 5.5 V Max tpd of 7.1 ns at 5 V Low Power Consumption, 10-µA Max ICC ±8-mA Output Drive at 5 V

Contextual Info: SN74AHCT1G00 SINGLE 2-INPUT POSITIVE-NAND GATE SCLS316M – MARCH 1996 – REVISED JANUARY 2003 D D D D D D D DBV OR DCK PACKAGE TOP VIEW Operating Range of 4.5 V to 5.5 V Max tpd of 7.1 ns at 5 V Low Power Consumption, 10-µA Max ICC ±8-mA Output Drive at 5 V

Contextual Info: SN74AHCT1G00 SINGLE 2-INPUT POSITIVE-NAND GATE SCLS316J – MARCH 1996 – REVISED JULY 2001 D D D DBV OR DCK PACKAGE TOP VIEW Inputs Are TTL-Voltage Compatible Latch-Up Performance Exceeds 250 mA Per JESD 17 ESD Protection Exceeds JESD 22 – 2000-V Human-Body Model (A114-A)

Contextual Info: SN74AHCT1G00 SINGLE 2-INPUT POSITIVE-NAND GATE SCLS316M – MARCH 1996 – REVISED JANUARY 2003 D D D D D D D DBV OR DCK PACKAGE TOP VIEW Operating Range of 4.5 V to 5.5 V Max tpd of 7.1 ns at 5 V Low Power Consumption, 10-µA Max ICC ±8-mA Output Drive at 5 V

Contextual Info: SN74AHCT1G00 SINGLE 2-INPUT POSITIVE-NAND GATE SCLS316M – MARCH 1996 – REVISED JANUARY 2003 D D D D D D D DBV OR DCK PACKAGE TOP VIEW Operating Range of 4.5 V to 5.5 V Max tpd of 7.1 ns at 5 V Low Power Consumption, 10-µA Max ICC ±8-mA Output Drive at 5 V

SN74AHCT1G00DCKR

Contextual Info: SN74AHCT1G00 SINGLE 2-INPUT POSITIVE-NAND GATE SCLS316M – MARCH 1996 – REVISED JANUARY 2003 D D D D D D D DBV OR DCK PACKAGE TOP VIEW Operating Range of 4.5 V to 5.5 V Max tpd of 7.1 ns at 5 V Low Power Consumption, 10-µA Max ICC ±8-mA Output Drive at 5 V

A115-A

Abstract: C101 SN74AHCT1G00 SN74AHCT1G00DBVR
Contextual Info: SN74AHCT1G00 SINGLE 2-INPUT POSITIVE-NAND GATE SCLS316M – MARCH 1996 – REVISED JANUARY 2003 D D D D D D D DBV OR DCK PACKAGE TOP VIEW Operating Range of 4.5 V to 5.5 V Max tpd of 7.1 ns at 5 V Low Power Consumption, 10-µA Max ICC ±8-mA Output Drive at 5 V

Contextual Info: SN74AHCT1G00 SINGLE 2-INPUT POSITIVE-NAND GATE SCLS316G – MARCH 1996 – REVISED OCTOBER 1998 D D D D DBV OR DCK PACKAGE TOP VIEW Inputs Are TTL-Voltage Compatible EPIC  (Enhanced-Performance Implanted CMOS) Process Latch-Up Performance Exceeds 250 mA Per

A115-A

Abstract: C101 SN74AHCT1G00 SN74AHCT1G00DBVR 74AHCT1G00DCKRG4
Contextual Info: SN74AHCT1G00 SINGLE 2-INPUT POSITIVE-NAND GATE SCLS316M – MARCH 1996 – REVISED JANUARY 2003 D D D D D D D DBV OR DCK PACKAGE TOP VIEW Operating Range of 4.5 V to 5.5 V Max tpd of 7.1 ns at 5 V Low Power Consumption, 10-µA Max ICC ±8-mA Output Drive at 5 V

Contextual Info: SN74AHCT1G00 SINGLE 2-INPUT POSITIVE-NAND GATE SCLS316M – MARCH 1996 – REVISED JANUARY 2003 D D D D D D D DBV OR DCK PACKAGE TOP VIEW Operating Range of 4.5 V to 5.5 V Max tpd of 7.1 ns at 5 V Low Power Consumption, 10-µA Max ICC ±8-mA Output Drive at 5 V

316e

Contextual Info: SN74AHCT1G00 SINGLE 2-INPUT POSITIVE-NAND GATE S C LS 316E -M AR C H 1996-R E V IS E D FEBRUARY 1998 Inputs Are TTL-Voltage Compatible DBV OR DCK PACKAGE TOP VIEW EP/C (Enhanced-Performance Implanted CMOS) Process Latch-Up Performance Exceeds 250 mA Per

Contextual Info: SN74AHCT1G00 SINGLE 2-INPUT POSITIVE-NAND GATE SCLS316K – MARCH 1996 – REVISED AUGUST 2001 D D D DBV OR DCK PACKAGE TOP VIEW Inputs Are TTL-Voltage Compatible Latch-Up Performance Exceeds 250 mA Per JESD 17 ESD Protection Exceeds JESD 22 – 2000-V Human-Body Model (A114-A)

Contextual Info: SN74AHCT1G00 SINGLE 2-INPUT POSITIVE-NAND GATE SCLS316L – MARCH 1996 – REVISED MAY 2002 D D D DBV OR DCK PACKAGE TOP VIEW Inputs Are TTL-Voltage Compatible Latch-Up Performance Exceeds 250 mA Per JESD 17 ESD Protection Exceeds JESD 22 – 2000-V Human-Body Model (A114-A)

Contextual Info: SN74AHCT1G00 SINGLE 2-INPUT POSITIVE-NAND GATE SCLS316M – MARCH 1996 – REVISED JANUARY 2003 D D D D D D D DBV OR DCK PACKAGE TOP VIEW Operating Range of 4.5 V to 5.5 V Max tpd of 7.1 ns at 5 V Low Power Consumption, 10-µA Max ICC ±8-mA Output Drive at 5 V

Contextual Info: SN74AHCT1G00 SINGLE 2-INPUT POSITIVE-NAND GATE SCLS316M – MARCH 1996 – REVISED JANUARY 2003 D D D D D D D DBV OR DCK PACKAGE TOP VIEW Operating Range of 4.5 V to 5.5 V Max tpd of 7.1 ns at 5 V Low Power Consumption, 10-µA Max ICC ±8-mA Output Drive at 5 V

SN74AHCT1G00

Abstract: scls316d
Contextual Info: SN74AHCT1G00 SINGLE 2-INPUT POSITIVE-NAND GATE SCLS316D – MARCH 1996 – REVISED JUNE 1997 D D D D DBV PACKAGE TOP VIEW Inputs Are TTL-Voltage Compatible EPIC  (Enhanced-Performance Implanted CMOS) Process High Latch-Up Immunity Exceeds 250 mA Per JESD 17

Contextual Info: SN74AHCT1G00 SINGLE 2-INPUT POSITIVE-NAND GATE SCLS316M – MARCH 1996 – REVISED JANUARY 2003 D D D D D D D DBV OR DCK PACKAGE TOP VIEW Operating Range of 4.5 V to 5.5 V Max tpd of 7.1 ns at 5 V Low Power Consumption, 10-µA Max ICC ±8-mA Output Drive at 5 V

Contextual Info: SN74AHCT1G00 SINGLE 2-INPUT POSITIVE-NAND GATE SCLS316H - MARCH 1996 - REVISED NOVEMBER 1999 • • • • EPIC Enhanced-Performance Implanted CMOS Process dbv or dck package

Contextual Info: SN74AHCT1G00 SINGLE 2-INPUT POSITIVE-NAND GATE SCLS316H – MARCH 1996 – REVISED NOVEMBER 1999 D D D D EPIC  Enhanced-Performance Implanted CMOS Process Inputs Are TTL-Voltage Compatible Latch-Up Performance Exceeds 250 mA Per JESD 17 Package Options Include Plastic

A115-A

Abstract: C101 SN74AHCT1G00 SN74AHCT1G00DBVR
Contextual Info: SN74AHCT1G00 SINGLE 2-INPUT POSITIVE-NAND GATE SCLS316M – MARCH 1996 – REVISED JANUARY 2003 D D D D D D D DBV OR DCK PACKAGE TOP VIEW Operating Range of 4.5 V to 5.5 V Max tpd of 7.1 ns at 5 V Low Power Consumption, 10-µA Max ICC ±8-mA Output Drive at 5 V