SP5524 Search Results
SP5524 Datasheets (6)
Part | ECAD Model | Manufacturer | Description | Curated | Datasheet Type | PDF Size | Page count | |
---|---|---|---|---|---|---|---|---|
SP5524 | Zarlink Semiconductor | 1.3GHz Bi-directional I2C Bus Controlled Synthesizer | Original | 210.22KB | 12 | |||
SP5524SKG | Zarlink Semiconductor | Original | 290.51KB | 10 | ||||
SP5524S KG MPAD | Zarlink Semiconductor | Bidirectional IC Bus Controlled Synthesiser | Original | 108.64KB | 9 | |||
SP5524SKGMPAD | Zarlink Semiconductor | Original | 290.51KB | 10 | ||||
SP5524S KG MPAS | Zarlink Semiconductor | Bidirectional I2C Bus Controlled Synthesiser | Original | 109.72KB | 9 | |||
SP5524SKGMPAS | Zarlink Semiconductor | Bidirectional I2C Bus Controlled Synthesiser | Original | 290.52KB | 10 |
SP5524 Datasheets Context Search
Catalog Datasheet | Type | Document Tags | |
---|---|---|---|
Contextual Info: w GEC PLESSEY S E M I C O N D ADVANCE INFORMATION DS3900-1.5 I.' SP5524 13 GHz BIDIRECTIONAL l2C BUS CONTROLLED SYNTHESISER The SP5524 is a single-chip frequency synthesiser designed for TV tuning systems. Control data is entered in the standard l2C BUS format. The device has six controllable open-collector |
OCR Scan |
DS3900-1 SP5524 SP5524 7bflS22 37bflS22 37bflSSS | |
Contextual Info: Si G E C P L E S S E Y S [ M I C O N D r C. T O R S ADVANCE INFORMATION DS3900 * 2.1 SP5524 1 3 GHz BIDIRECTIONAL PC BUS CONTROLLED SYNTHESISER Supersedes version in April 1994 Consumer 1C Handbook, H B 3120 - 2.0 The SP5524 is a single-chip frequency synthesiser designed |
OCR Scan |
DS3900 SP5524 SP5524 37bflS22 37bA555 37baS22 250MHz | |
2N3904
Abstract: 2N3906 DS3900 SP4902 SP5524
|
Original |
DS3900 SP5524 HB3120 SP5524 2N3904 2N3906 SP4902 | |
2N3904
Abstract: 2N3906 DS3900 SP4902 SP5524
|
Original |
SP5524 DS3900 SP5524 2N3904 2N3906 SP4902 | |
Contextual Info: SP5524 Bidirectional I2C Bus Controlled Synthesiser DS3900 - 2.1 March 1995 The SP5524 is a single-chip frequency synthesiser designed for TV tuning systems. Control data is entered in the standard I2C BUS format. The device has six controllable open-collector |
Original |
SP5524 DS3900 SP5524 SP5524S | |
Contextual Info: THIS DOCUMENT IS FOR MAINTENANCE PURPOSES ONLY AND IS NOT RECOMMENDED FOR NEW DESIGNS MARCH 1995 ADVANCE INFORMATION DS3900 - 2.1 SP5524 1•3 GHz BIDIRECTIONAL I2C BUS CONTROLLED SYNTHESISER Supersedes version in April 1994 Consumer IC Handbook, HB3120 - 2.0 |
Original |
DS3900 SP5524 HB3120 SP5524 | |
2N3904
Abstract: 2N3906 DS3900 SP4902 SP5524
|
Original |
SP5524 DS3900 SP5524 2N3904 2N3906 SP4902 | |
Contextual Info: THIS DOCUMENT IS FOR MAINTENANCE PURPOSES ONLY AND IS NOT RECOMMENDED FOR NEW DESIGNS MARCH 1995 ADVANCE INFORMATION DS3900 - 2.1 SP5524 1•3 GHz BIDIRECTIONAL I2C BUS CONTROLLED SYNTHESISER Supersedes version in April 1994 Consumer IC Handbook, HB3120 - 2.0 |
Original |
DS3900 SP5524 HB3120 SP5524 | |
3cot
Abstract: SL441C TDA6358
|
OCR Scan |
SP4633 SP4660 SP4666 SP4740 SP4902 SP4904 SP4908 SP4914 12-bit 24kHz 3cot SL441C TDA6358 |