ST52X520 Search Results

AN1525

Abstract: ST24C04
Contextual Info: AN1525 APPLICATION NOTE I2C Communication between ST52x520 and EEPROM Author: C.Ruggieri 1 INTRODUCTION This AN shows an example of how to interface style I2C EEPROM with an ST52x520 microcontroller using an I2C protocol. An ST24C04 4Kbit memory is used for this example, although similar thoughts are also

PDIP28

Abstract: ST52T521 22 CDIP T521
Contextual Info: ST52T520/E520/T521  ST52T520/E520/T521 8-BIT INTELLIGENT CONTROLLER UNIT ICU Two Timer/PWMs, ADC, I2C, SPI PRELIMINARY DATASHEET Memories • Up to 8 Kbytes EPROM/OTP ■ Up to 512 bytes of RAM ■ Readout protection Core ■ Register File based architecture

FUZZY MICROCONTROLLER ALGORITHM

Contextual Info: ST52F510/F513/F514  ST52F510/F513/F514 8-BIT INTELLIGENT CONTROLLER UNIT ICU Two Timer/PWMs, ADC, I2C, SPI, SCI TARGET SPECIFICATION Memories • Up to 8 Kbytes Single Voltage Flash Memory ■ Up to 512 bytes of RAM ■ Up to 4 Kbytes Data EEPROM ■

Contextual Info: ST52T520/E520/T521  ST52T520/E520/T521 8-BIT INTELLIGENT CONTROLLER UNIT ICU Two Timer/PWMs, ADC, I2C, SPI PRELIMINARY DATASHEET Memories • Up to 8 Kbytes EPROM/OTP ■ Up to 512 bytes of RAM ■ Readout protection Core ■ Register File based architecture

pbi07

Abstract: F504 PDIP28 ST52F500
Contextual Info: ST52F500/F503/F504  ST52F500/F503/F504 8-BIT INTELLIGENT CONTROLLER UNIT ICU Two Timer/PWMs, I2C, SPI TARGET SPECIFICATION Memories • Up to 8 Kbytes Single Voltage Flash Memory ■ Up to 512 bytes of RAM ■ Up to 4 Kbytes Data EEPROM ■ In Situ Programming in Flash devices (ISP)

Contextual Info: ST52T520/E520/T521  ST52T520/E520/T521 8-BIT INTELLIGENT CONTROLLER UNIT ICU Two Timer/PWMs, ADC, I2C, SPI PRELIMINARY DATASHEET Memories • Up to 8 Kbytes EPROM/OTP ■ Up to 512 bytes of RAM ■ Readout protection Core ■ Register File based architecture

PI fuzzy

Contextual Info:  ST FIVE 508 series ST FIVE 508 series 8-BIT INTELLIGENT CONTROLLER UNIT ICU FAMILY Timer/PWMs, ADC, SCI, I2C, SPI TARGET SPECIFICATION Memories • Up to 8 Kbytes EPROM/OTP or Single Voltage Flash. Up to 64 Kbytes of Program/Data Memory addressing capability

Contextual Info: ST52F500/F503/F504 ST52F500/F503/F504  8-BIT INTELLIGENT CONTROLLER UNIT ICU Two Timer/PWMs, I2C, SPI TARGET SPECIFICATION Memories • Up to 8 Kbytes Single Voltage Flash Memory ■ Up to 512 bytes of RAM ■ Up to 4 Kbytes Data EEPROM ■ In Situ Programming in Flash devices (ISP)

locking eprom

Abstract: e520
Contextual Info: ST52T520/E520/T521  ST52T520/E520/T521 8-BIT INTELLIGENT CONTROLLER UNIT ICU Two Timer/PWMs, ADC, I2C, SPI PRELIMINARY DATASHEET Memories • Up to 8 Kbytes EPROM/OTP ■ Up to 512 bytes of RAM ■ Readout protection Core ■ Register File based architecture

t52111

Contextual Info: ST52T520/E520/T521  ST52T520/E520/T521 8-BIT INTELLIGENT CONTROLLER UNIT ICU Two Timer/PWMs, ADC, I2C, SPI PRELIMINARY DATASHEET Memories • Up to 8 Kbytes EPROM/OTP ■ Up to 512 bytes of RAM ■ Readout protection Core ■ Register File based architecture

E520

Contextual Info: ST52T520/E520 8-BIT INTELLIGENT CONTROLLER UNIT ICU Two Timer/PWMs, ADC, I2C, SPI TARGET SPECIFICATION Memories • Up to 8 Kbytes EPROM/OTP ■ Up to 512 bytes of RAM ■ Readout protection Core Register File based architecture ■ ■ 105 basic instructions

triac tag 9131

Abstract: ST52 CH2017 TRIAC TAG 265 600 tag triac codes 20 to 99
Contextual Info: VISUAL FIVE 5.0 USER MANUAL PRELIMINARY DATA Rev. 2.5 - September 2002 VISUAL FIVE 5.0 OWNERSHIP STMicroelectronics is the sole owner of the Software contained in the package. STMicroelectronics is the holder of the copyright to the Software, including without limitation such aspects

Contextual Info: ST52T520/E520/T521  ST52T520/E520/T521 8-BIT INTELLIGENT CONTROLLER UNIT ICU Two Timer/PWMs, ADC, I2C, SPI PRELIMINARY DATASHEET Memories • Up to 8 Kbytes EPROM/OTP ■ Up to 512 bytes of RAM ■ Readout protection Core ■ Register File based architecture