STS48 Search Results

SPECTRA-9953

Abstract: STS-192 STS-48 PM5317
Contextual Info: PM5317 SPECTRA-9953 Advance SONET/SDH Payload Extractor/Aligner for 9953 Mbit/s FEATURES • Monolithic single channel STS192/STM-64 or quad channel STS48/STM-16 SONET/SDH Payload extractor/aligner. • Designed for use in interface applications operating at serial

OTU1

Abstract: XIP2174 Paxonet Communications OC48 ISE4 OTN testbench
Contextual Info: STS48 OTN Framer/Digital Wrapper CC381 July 9, 2002 Product Specification AllianceCORE Facts Provided with Core Documentation User Guide, Design Guide EDIF netlist Design File Formats Constraints File cc381.ucf Testbench, test scripts Verification Tool

PM5379

Abstract: 4X4X2 PM5307 PM5317 PM5372 PM5374 PM7390 SPECTRA-9953 UNI-9953 time slot interchange diagram
Contextual Info: PM5307 TBS-9953 Preliminary 9.953 Gbit/s TelecomBus Serializer FEATURES 4 x 2.488 Gbit/s to 3 x 4 x 2.488 Gbit/s W,P,A Supports redundant working/protection time-space-time switch fabrics, including the PM5372 TSE and PM5374 TSE-160 devices. Supports STS-192c/STM-64c, STS48c/STM-16c, STS-12c/STM-4c, and

PM5326

Abstract: PM5377 STS192 STS-48
Contextual Info: PM5377 TSE 240 Released Single Chip 96-Port STS-1/STM-0 Cross-Connect FEATURES DELAY MANAGEMENT • Implements a 240G memory switch fabric with STS-1/AU-3 switching granularity. • 96 ingress and 96 egress STS48/STS-12 ports for a maximum of 4608 STS-1/AU-3 streams in a single

PM5326

Abstract: PM5324 PM5377 STS192 STS-48
Contextual Info: PM5377 TSE 240 Advance Single Chip 96 Port SONET/SDH Cross-Connect Switch Element FEATURES TOH PROCESSING AND TESTING • Implements a 240G memory switch fabric with STS-1/AU-3 switching granularity. • 96 ingress and 96 egress STS48/STS-12 ports for a maximum of

ADM processor

Abstract: regenerator in optical SPECTRA-9953 PM5317 STS-192 STS-48
Contextual Info: PM5317 SPECTRA-9953 Preliminary SONET/SDH Payload Extractor/Aligner for 9953 Mbit/s FEATURES • Monolithic single channel STS192/STM-64 or quad channel STS48/STM-16 SONET/SDH Payload extractor/aligner. • Designed for use in interface applications operating at serial

9953

Abstract: 4X4X2 PM5307 PM5317 PM5372 PM5374 PM7390 SPECTRA-9953 time slot interchange diagram
Contextual Info: PM5307 TBS-9953 Advance 9.953 Gbit/s Telecom Bus Serializer FEATURES 4 x 2.488 Gbit/s to 3 x 4 x 2.488 Gbit/s W,P,A Supports redundant working/protection time-space-time switch fabrics, including the PM5372 TSE and PM5374 TSE-160 devices. Supports STS-192c/STM-64c, STS48c/STM-16c, STS-12c/STM-4c, and

9953

Abstract: 4X4X2 PM5307 PM5317 PM5372 PM5374 PM7390 SPECTRA-9953 9953 ad time slot interchange diagram
Contextual Info: PM5307 TBS-9953 Advance 4 x 2.488 Gbit/s to 3 x 4 x 2.488 Gbit/s W,P,A Supports redundant working/protection time-space-time switch fabrics, including the PM5372 TSE and PM5374 TSE-160 devices. Supports STS-192c/STM-64c, STS48c/STM-16c, STS-12c/STM-4c, and

Contextual Info: PM5397 ARROW 2xGE Preliminary 01 :0 9: 02 P in er In co n Th ur sd ay ,0 3A pr • Single chip, dual channel Gigabit Ethernet, SONET/SDH Virtual Concatenation VC mapper to STS48/STM-16 using either frame mapped Generic Frame Procedure (GFP), LAPS/X.86 or BCP/PPP HDLC

TranSwitch Corporation

Abstract: B2M1-5
Contextual Info: PHAST-1 Device SONET STS-1 Overhead Terminator TXC-06101 DATA SHEET • Provides SONET interface to any type of payload • Programmable STS-1 or STS-N modes • Receive bit-serial STS-1 signal input to the Line Side using external reference frame pulse for

TXC-16742

Abstract: EtherPHAST-48 TXC-16742-MC
Contextual Info: TM EtherPHAST -48 Pt Device OC-48/STM-16 SONET/SDH Ethernet Mapper TXC-16742 PRODUCT INFORMATION FEATURES APPLICATIONS • 1x STS-48/STM-16 or 4x STS-12/STM-4 framer with TOH processing, 4x 622 LVDS line side interface • 622 MHz Tx side clock synthesizer

A1515-1

Contextual Info: EtherMap -48 Device OC-48 SONET/SDH Ethernet Mapper TXC-06710 TECHNICAL OVERVIEW PRODUCT PREVIEW TERMINAL SIDE Control & Clock EEPROM Signals Serial Interface EtherMap™-48 TXC-06710 is a highly-integrated device for mapping IEEE 802.3 100/1000 Mbps Ethernet and block encoded

MC 4011 BCP

Abstract: PKT 4113 API ncp 6131 SWITCHING SYSTEMS INTERNATIONAL sqm 225 leach 1522 her 4541 MSP SNCP t 1451 n 52 toh SWITCHING SYSTEMS INTERNATIONAL sqm 350 k2400 EQUIVALENT
Contextual Info: EtherPHAST -24 Device 2x OC-12/STM-4 SONET/SDH Ethernet Mapper TXC-06745 DATA SHEET TXC-06745-MB, Ed. 2 February 2006 FEATURES APPLICATIONS • Client Interfaces: 2x GMII/24x SMII/4x TBI/MPI 24 channel packet all pin shared • Two serial Gigabit Ethernet (1.25 Gbit/s) ports with integrated CRSU/SerDes (8B/10B)

Contextual Info: BCM8228 VARIRATE MULTIRATE TRANSCEIVER WITH SONET RATE ADAPTATION AND PERFORMANCE MONITORING SUMMARY OF BENEFITS FEATURES • Highly-integrated rate-adaptation device that maps a single STS-3/ STM-1 or a single STS-12/STM-4 stream into STS-48/STM-16 frames.

power amplifier ic ta2040

Abstract: Nokia 6100 LCD TA2040 Transceiver Broadcom 3G RF interfacing 8051 with bluetooth modem Tripath TA2040 AMPLIFIER pixelworks L7205 tft interface with 8051 trw radar ac
Contextual Info: SEMICONDUCTOR TIMES JULY 2000 / 1 JULY 2000 FOCUSED ON EMERGING SEMICONDUCTOR COMPANIES Radar Scope Bay Microsystems Bay Microsystems was recently founded to develop chips. What kind? The company wouldn’t disclose any details to us. One rumor is “high-speed interfaces” whatever

2258J

Abstract: open LVDS deserialization IP JB 2256
Contextual Info: PRELIMINARY SPECIFICATION > 4 M C SO N E T/SD H /A TM OC-48 1 :8 RECEIVER FEATURES • Micro-power Bipolar technology • Complies with ANSI, Bellcore, and ITU-T specifications • Supports 2.4 Gbps OC-48 • 8-bit LVDS data path • Compact 100 TQFP/TEP package

Contextual Info: > 4M DEVICE SPECIFICATION C C S O N E T /S D H /A T M O C -3 /O C -1 2 T R A N S C E IV E R FEATURES GENERAL DESCRIPTION • Complies with ANSI, Bellcore, and ITU-T specifications • Jitter generation better than ITU-T requirements • On-chip high-frequency PLL for clock

TT 2246

Contextual Info: >4MCC PRELIMINARY SPECIFICATION S O N E T/S D H /A TM O C-48 8:1 TR AN SM ITTER FEATURES GENERAL DESCRIPTION • Micro-power Bipolar technology • Complies with ANSI, Bellcore, and ITU-T specifications • On-chip high-frequency PLL for clock generation • Supports 2.4 GHz OC-48

soc 1044

Contextual Info: DEVICE SPECIFICATION > 4M C SO N E T/SD H /A TM O C -3/12 TR AN SCEIVER W /CDR FEATURES • Complies with ANSI, Bellcore, and ITU-T specifications • On-chip high-frequency PLLs for clock generation and clock recovery • Supports 155.52 MHz OC-3 and 622.08

GR-253

Abstract: STM-16 STS-48 XRT91L80 10P110 K 2666
Contextual Info: xr XRT91L80 PRELIMINARY 2.488/2.666 GBPS STS-48/STM-16 SONET/SDH TRANSCEIVER JULY 2005 REV. P1.1.0 GENERAL DESCRIPTION control of the FIFO_AUTORST pin can automatically recover from an overflow condition. The operation of the device can be monitored by checking the status

TXC-06101AILQ

Abstract: TAIS SOT GR-253-CORE TXC-06101 GR-1400-CORE 1C11C
Contextual Info: PHAST-1 Device SONET STS-1 Overhead Terminator TXC-06101 DATA SHEET • Provides SONET interface to any type of payload • Programmable STS-1 or STS-N modes • Receive bit-serial STS-1 signal input to the Line Side using external reference frame pulse for

ORT8850

Abstract: ORT8850H ORT8850L STM-64 STS-192
Contextual Info: Preliminary Product Brief May 2000 ORCA ORT8850 Field-Programmable System Chip Introduction Field-programmable system chips FPSCs bring a whole new dimension to programmable logic: FPGA logic and an embedded system solution on a single device. Lucent Technologies Microelectronics Group

OC-24

Abstract: S3056 S3063 S3064 STM-16 STS-48
Contextual Info: DEVICE SPECIFICATION SONET/SDH/ATM OC-48 DIFFERENTIAL 1:16 RECEIVER BiCMOS LVPECL OC-12 CLOCKDIFFERENTIAL GENERATOR 1:16 SONET/SDH/ATM OC-48 TRANSMITTER ANDRECEIVER RECEIVER FEATURES S3064 S3064 S3064 GENERAL DESCRIPTION • Micro-power Bipolar technology

75l00d

Contextual Info: áç XRT75L00D E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET DESYNCHRONIZER NOVEMBER 2003 REV. 1.0.1 • On-chip clock synthesizer provides the appropriate GENERAL DESCRIPTION The XRT75L00D is a single-channel fully integrated Line Interface Unit LIU with Sonet Desynchronizer