TI016 Search Results

74AC11651

Abstract: BT113 e21c
Contextual Info: 31E D TEXAS INSTR LOGIC fHbiTaa GGöa^s □ m i n ? 54AC11651, 74AC11651 OCTAL BUS TRANSCEIVERS AND REGISTERS TI0163—D3444, MARCH 1990 54AC11651 . . . JT PACKAGE 74AC11651. . . DW OR NT PACKAGE • Bus Transceivers/Registers • Independent Registers and Enables for A

74AC11651

Contextual Info: 54AC11651, 74AC11651 OCTAL BUS TRANSCEIVERS AND REGISTERS TI0163— 0 3 4 4 4 , MARCH 1990 54AC11651 . . . JT PACKAGE 74AC11651 . . . DW OR NT PACKAGE • Bus Transceivers/Registers • Independent Registers and Enables for A and B Buses TOP VIEW • Multiplexed Real-Time and Stored Data

54ACT16646

Abstract: 74ACT11646 74ACT16646 I14P
Contextual Info: 54ACT16646, 74ACT16646 16-BIT BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS TI0169— D3478, M ARCH 1980 Member of the Texas Instruments Widebus Family 54ACT16646 . . . WD PACKAGE 74ACT16646 . . . DL PACKAGE TOP VIEW Packaged in Shrink Small-Outline 300-mil

74ACT11873

Contextual Info: 54ACT11873, 74ACT11873 DUAL 4-BIT D-TYPE LATCHES WITH 3-STATE OUTPUTS TI0168—D3399. MARCH 1990 • Inputs are TTL-Voltage Compatible 5 4 A C T I f * 7 3 . . . J T P ACKA G E 74A C T 11 8 73 . . . D W OR N T PACKA GE • 3-State Buffer-Type Outputs Drive Bus Lines

1D11D

Abstract: 74AC11873
Contextual Info: 54AC11873, 74AC11873 DUAL 4-BIT D-TYPE LATCHES WITH 3-STATE OUTPUTS TI016 7 -0 3 3 9 6 , MARCH 1980 • 3-S tate B uffer-Type O utputs Drive Bus Lines D irectly • Bus-Structured Pinout • Flow -Through A rchitectu re to O ptim ize PCB Layout • Center-Pin V q C and GND C onfigurations to

Contextual Info: 54ACT16646, 74ACT16646 16-BIT BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS TI0169— D347B. MARCH 1990 Member of the Texas Instruments Widebus Family 54ACT16646 . . . WD PACKAGE 74ACT16646 . . . DL PACKAGE TOP VIEW Packaged in Shrink Smali-Outiine 300-mll

TI0166

Abstract: ACT11833
Contextual Info: 54ACT11833, 74ACT11833 8-BIT TO 9-BIT PARITY BUS TRANSCEIVERS TI0166— D3449, MARCH 1990 • 54ACT11833 . . . JT PACKAGE 74ACT11833 . . . DW OR NT PACKAGE Inputs are TT L-V o ltag e C om patible H igh-Speed Bus Transceivers with Parity G e n erato r/C h eck er

74AC11377

Abstract: 74ACT11377 D3420
Contextual Info: 54AC11377, 74AC11377 OCTAL D-TYPE FLIP-FLOP WITH CLOCK ENABLE TI0160— 0 3 4 2 0 , M ARCH 1990 Contains Eight D-Type Flip-Flops 54AC11377 . . . JT PACKAGE 74AC11377 . . . DW OR NT PACKAGE Clock Enable Latched to Avoid False Clocking TOP VIEW 1Q [ 1 U 2Q [ 2

Contextual Info: 54AC11377, 74AC11377 OCTAL D-TYPE FLIP-FLOP WITH CLOCK ENABLE TI0180— D3420, M A R C H 1990 Contains Eight D-Type Flip-Flops 54AC11377 . . . JT PACKAGE 74AC11377 . . . DW OR NT PACKAGE Clock Enable Latched to Avoid False Clocking TOP VIEW 1Q [ 2Q [ 3Q [

AUO-PL321.15

Abstract: 54AC11181 74AC 74AC11181
Contextual Info: 54AC11181, 74AC11181 ARITHMETIC LOGIC UNITS/FUNCTION GENERATORS TI0184— D3119, APRIL 1989— REVISED MARCH 1990 54AC11181 . . . JT PACKAGE 74AC11181 . . . DW OR NT PACKAGE Flow-Through Architecture to Optimize PCB Layout TOP VIEW Minimize High-Speed Switching Noise

TI046

Abstract: 74AC11651
Contextual Info: 31E 0 TEXAS INSTR LOGIC • 6^3.723 OOfiflTTS □ ■ T I I 3 54AC11651, 74AC11651 OCTAL BUS TRANSCEIVERS AND REGISTERS T10163—D3444, MARCH 1990 H • Bus Transceivers/R eglsters I I • Independent Registers and Enables for A and B Buses I • Multiplexed Real-Tim e and Stored Data

oak technology oti 067

Abstract: oak oti-067 P2WKP
Contextual Info: DC SPECIFICATION ABSOLUTE MAXIMUM RATINGS Ambient Operating Temperature OC to +70C Storage Temperature -65 deg C to +150 deg C Supply Voltage to Ground Potential -0.5V to +7.0V Applied Input Voltage -0.5V to +7.0V Stresses above those listed may cause permanent damage to the device. These are

XD13

Contextual Info: TMX320C30, TMS320C30 DIGITAL SIGNAL PROCESSORS SPRS032-APRIL 1996 High-Performance Floating-Point Digital Signal Processor DSP - TMX320C30-50 40-ns Instruction Cycle Time 275 MOPS, 50 MFLOPS, 25 MIPS - TMS320C30-40 50-ns Instruction Cycle Time 220 MOPS, 40 MFLOPS, 20 MIPS

74AC11648

Contextual Info: 54ACT11648, 74ACT11648 OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS T I0 1 6 2 — D 34 58, M A R C H 1990 5 4A C T 11648 . JT P A C K A G E 7 4A C T 11648 . 0 W O R NT P A C K A G E Inputs are TTL-Voltage Compatible • Independent Registers A and B Buses

Contextual Info: 54AC11833, 74AC11833 8-BIT TO 9-BIT PARITY BUS TRANSCEIVERS T 10165— D 3448, MARCH 1990 High-Speed Bus Transceivers with Parity Generator/Checker 5 4A C 11 8 33 . . . J T P ACKA G E 7 4 A C 11833 . . . D W OR N T P ACKA G E TO P V IE W Parity-Error Flag Open-Draln Output

t1188

Contextual Info: 54AC11881, 74AC11881 ARITHMETIC LOGIC UNITS/FUNCTION GENERATORS TI0187— 0 3 4 7 9 , MARCH 1990 Full Look-Ahead for High-Speed Operations on Long Words 54AC11681 . . . JT PACKAGE 74AC11881 . . . OW OR NT PACKAGE TOP VIEW Arithmetic Operating Modes: Addition,

74ACT11651

Abstract: 74AC11651
Contextual Info: 54ACT11651, 74ACT11651 OCTAL BUS TRANSCEIVERS AND REGISTERS T I0164— D3445, MARCH 1990 Inputs are TTL-Voltage Compatible 54ACT11651 . . . JT PACKAGE 74ACT11651 . . . DW OR NT PACKAGE Bus Transceivers/Registers TOP VIEW Independent Registers and Enables for A

74AC11873

Contextual Info: TEXAS INSTR LOGIC 31E 3> ^ , 1/ 1 2 3 o a a ^ a s D a 54AC11873, 74AC11873 DUAL 4-BIT D-TYPE LATCHES WITH 3-STATE OUTPUTS ,v , 3-State Buffer-Type Outputs Drive Bus Lines Directly Bus-Structured Pinout Flow-Through Architecture to Optimize PCB Layout 7 _T10167— D3398, MARCH 1990

74AC11873

Contextual Info: TEXAS INSTR LOGIC .0Tb 1723 OGÔ^ÜSD Ô 31E D ,1/ T 54AC11873, 74AC11873 DUAL 4-B1T D-TYPE LATCHES WITH 3-STATE OUTPUTS rv i _T10167— D3398, MARCH 1990 - 54AC11873 . . . JT PACKAGE 74AC11873 . . . DW OR NT PACKAGE (TOP VIEW) • 3-State Buffer-Type Outputs Drive Bus Lines

74ACT11086

Abstract: MIK 494 T-43-21 TTO185 D3330
Contextual Info: TEXAS INSTR LOGIC 31E D 0^1723 QGÔÔ534 3 54ACT11086, 74ACT11086 QUADRUPLE 2-INPUT EXCLUSIVE-OR GATES T 'Ì 3 'Z 4 ~ o O N O VEM B ER 1989 T O 185— D 3390, NOVEI* • Inputs are TTL-Voltage Compatible 54ACT11086 . . . J PACKAGE 74ACT11086 . . . D OR N PACKAGE

3284f

Abstract: BT812 OTI-077 2TT 4.00 MG CL-GD543X ati rage 3d ii ATI Rage M3 OTI64107 spitfire ATI Rage pro 128
Contextual Info: OAK TECHNOLOGY Multimedia Solutions in Silicon SPITFIRE 64-bit Multimedia GUI Accelerator OTI-64107/64105 Preliminary Specification September 1994 Oak Technology, Inc. • 139 Kifer Court • Sunnyvale, CA 94086 *Phone 408 737-0888 • FAX (408) 737-3838

AUO-PL321.15

Abstract: 54AC11181 74AC 74AC11181 AC11881 hlab D3119
Contextual Info: 54AC11181, 74AC11181 ARITHMETIC LOGIC UNITS/FUNCTION GENERATORS TI0184— D3119, APRIL 1989— REVISED MARCH 1990 54AC11181 . . . JT PACKAGE 74AC11181 . . . DW OR NT PACKAGE Flow-Through Architecture to Optimize PCB Layout TOP VIEW Minimize High-Speed Switching Noise

oti 64105

Abstract: oti-088
Contextual Info: OAK TECHNOLOGY Multimedia Solutions in Silicon SPITFIRE 64-bit Multimedia GUI Accelerator OTI-64107/64105 Preliminary Specification September 1994 Oak Technology, Inc. • 139 Kifer Court • Sunnyvale, CA 94086 *Phone 408 737-0888 • FAX (408) 737-3838

74AC11648

Contextual Info: 54AC11648, 74AC 11648 OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS T10161—D3457, MARCH 1990 Independent Registers A and B Buses 54AC11648 . . . JT PACKAGE 74AC11648 . . . DW OR NT PACKAGE Multiplexed Real-Time and Stored Data TOP VIEW Inverting Data Paths