VG264265
Abstract: VG264260B
Text: VG264260BJ 262,144x16-Bit CMOS Dynamic RAM VIS TRUTH TABLE 2-CKE Notes: 1-4 CKEn-1 CKE n CURRENT STATE COMANDn ACTIONn L L Power-Down X Maintain Power-Down Self Refresh X Maintain Self Refresh Power-Down COMMAND INHIBIT or NOP Exit Power-Down 5 Self Refresh
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VG264260BJ
144x16-Bit
edg16
1G5-0157
VG264265
VG264260B
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VG264265BJ
Abstract: VG264260BJ-35 vg264265bj-35 VG264265 VG264260B VG26V4265BJ vg264265b
Text: VG26V4265BJ 262, 144 x 16 - Bit CMOS Dynamic RAM VIS Description The device is CMOS Dynamic RAM organized as 262,144 words x 16 bits with extended data out access mode. It is fabricated with an advanced submicron CMOS technology and advanced CMOS circuit design
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40-pin
VG26V4265BJ
50/60/70ns
1G5-0090
VG264260BJ-35
VG264260BJ-4
VG264260BJ-45
VG264260BJ-5
300mil
VG264265BJ
vg264265bj-35
VG264265
VG264260B
vg264265b
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VG264265
Abstract: VG264265B VG264260SJ-50 VG264265BJ CAC10 VG264 DOUT20
Text: V G 264260BJ 262,144 x 16-Bit CMOS Dynamic RAM Description The device is CMOS Dynamic RAM organized as 262,144-word x 16 bits. It is fabricated with an advanced submicron CMOS technology and advanced CMOS circuit design technologies. It is packaged in JEDEC standard 40-pin plastic SOJ package.
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OCR Scan
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PDF
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264260BJ
16-Bit
144-word
40-pin
VG264265
VG264265B
VG264260SJ-50
VG264265BJ
CAC10
VG264
DOUT20
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