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Catalog Datasheet	MFG & Type	PDF	Document Tags
PLB DDR2 with PLB Central DMA Abstract: DDR2 SDRAM ECC and Application Note PLB DDR2 with OPB Central DMA DS472 ML410 XAPP935 plb 405 Text: Application Note: Embedded Processing R XAPP935 v1.1 June 7, 2007 Abstract Reference System: PLB DDR2 with OPB Central DMA Author: James Lucero This reference system demonstrates the functionality of the Processor Local Bus (PLB) Double Data Rate 2 (DDR2) Synchronous DRAM (SDRAM) memory controller in a PowerPC 405	Original	PDF	XAPP935 DS472, ML410 PLB DDR2 with PLB Central DMA DDR2 SDRAM ECC and Application Note PLB DDR2 with OPB Central DMA DS472 XAPP935 plb 405

Catalog Datasheet

MFG & Type

PDF

Document Tags

PLB DDR2 with PLB Central DMA

Abstract: DDR2 SDRAM ECC and Application Note PLB DDR2 with OPB Central DMA DS472 ML410 XAPP935 plb 405
Text: Application Note: Embedded Processing R XAPP935 v1.1 June 7, 2007 Abstract Reference System: PLB DDR2 with OPB Central DMA Author: James Lucero This reference system demonstrates the functionality of the Processor Local Bus (PLB) Double Data Rate 2 (DDR2) Synchronous DRAM (SDRAM) memory controller in a PowerPC 405

Original

PDF

XAPP935 DS472, ML410 PLB DDR2 with PLB Central DMA DDR2 SDRAM ECC and Application Note PLB DDR2 with OPB Central DMA DS472 XAPP935 plb 405