XRT7250 Search Results

dmo 365 rn

Abstract: DMO36 dmo 365 r IC TX 434 HDB3 AMI ENCODER DECODER t90 series DS3-M13 XRT7250 XRT7250IQ difference between 8051 and 8052 microcontroller
Contextual Info: áç XRT7250 PRELIMINARY DS3/E3 FRAMER IC MARCH 2000 REV. P1.0.5 GENERAL DESCRIPTION The XRT7250 DS3/E3 Framer IC is designed to accept “User Data” from the Terminal Equipment and insert this data into the “payload” bit-fields within an “outbound” DS3/E3 Data Stream. Further, the Framer

G832

Contextual Info: XRT7250 P r e lim in a r y DS3/E3 Framer IC October 1996-1 FEATURES • Supports the following data rates/framing formats DS3, C-Bit Parity DS3.M13 E3, ITU-T G.751 E3, ITU-T G.832 • Includes Transmit and Receive HDLC Controllers • Includes 88 Bytes of On-chip RAM for Transmit

TR-TSY-000009

Abstract: G832 BELLCORE T1 standards
Contextual Info: DATA SHEET Communications XRT7250 DS3/E3 Framer IC Features • Transmits, Receives and Processes data in the DS3-C-bit Parity, DS3-M13, • E3-ITU-T G.751 and E3-ITU-T G.832 Framing Formats. • Interfaces to all Popular Microprocessors • Integrated Framer Performance Monitor

Contextual Info: Preliminary XRT7250 7Z T E X A R DS3/E3 Framer IC r October 1998-1 FEATURES • Supports the following data rates/framing formats DS3, C-Bit Parity DS3.M 13 E3, ITU-T G.751 E3, ITU-T G.832 • Includes Transm it and Receive HDLC Controllers • Includes 88 Bytes of On-chip RAM for Transmit

all ic data

Abstract: "Line Interface" XRT7250 XRT7250IQ XRT7300
Contextual Info: EX4R XRT7250 DS3/E3 Framer IC October 1998-1 FEATURES • Supports the following data rates/framing formats DS3, C-Bit Parity DS3.M13 E3, ITU-T G.751 E3, ITU-T G.832 • Includes Transmit and Receive HDLC Controllers • Includes 88 Bytes of On-chip RAM for Transmit

ic 381

Abstract: 147il dmo 365 rn Ic 384
Contextual Info: áç XRT7250 PRELIMINARY DS3/E3 FRAMER IC OCTOBER 2000 REV. P1.0.7 GENERAL DESCRIPTION The XRT7250 DS3/E3 Framer IC is designed to accept “User Data” from the Terminal Equipment and insert this data into the “payload” bit-fields within an “outbound” DS3/E3 Data Stream. Further, the Framer

dmo 365 r

Abstract: IC A 2388 DS3-M13 IC TX 434 dmo 365 rn RT7300 4T701 XRT7250 XRT7250IQ 43a 244
Contextual Info: áç XRT7250 DS3/E3 FRAMER IC DECEMBER 2000 REV. 1.1.0 GENERAL DESCRIPTION The XRT7250 DS3/E3 Framer IC is designed to accept “User Data” from the Terminal Equipment and insert this data into the “payload” bit-fields within an “outbound” DS3/E3 Data Stream. Further, the Framer

dmo 365 r

Abstract: ic 381 RT7300 IC A 2388 178AP DS3-M13 XRT7250 XRT7250IQ xrt7250iq100
Contextual Info: áç XRT7250 DS3/E3 FRAMER IC MARCH 2001 REV. 1.1.1 GENERAL DESCRIPTION The XRT7250 DS3/E3 Framer IC is designed to accept “User Data” from the Terminal Equipment and insert this data into the “payload” bit-fields within an “outbound” DS3/E3 Data Stream. Further, the Framer

rur 450

Abstract: GR-253-CORE GR-499-CORE T3001 XRT7250 XRT7300
Contextual Info: TAN-19 Application Note – Considerations for Designing the XRT7250 and XRT7300 Device in a DS3 Line Card Rev. 1.00 Application Preliminary April 7, 2000 Considerations for Designing the XRT7250 and XRT7300 Devices in a DS3 Line Card Application 1 TAN-19

Contextual Info: DATA SHEET Communications T3/STS-1/E3 XRT7250 DS3/E3 Framer IC The XRT7250 is a single-chip DS3/E3 framer for bandwidth intensive network applications. Based upon low-power CMOS processes, the XRT7250 framer is part of a total DS3/E3 solution accompanied by the Exar XRT7300 transceiver that is available now for targeted

r4363

Abstract: CP Clare RELAY dmo 465 IC 404
Contextual Info: áç XRT72L53 PRELIMINARY THREE CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER JANUARY 2001 REV. P1.1.6 GENERAL DESCRIPTION The XRT72L53, 3 Channel DS3/E3 Framer IC is designed to accept User Data from the Terminal Equipment and insert this data into the Payload bit-fields

B628

Abstract: datasheet relay NAIS 5v 5 pin iC 458 XRT72L58 "Encoder IC" NAIS 210 RELAY octal tri state buffer ic DS3-M13 XRT72L58IB TTB-11
Contextual Info: áç XRT72L58 PRELIMINARY EIGHT CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER JANUARY 2001 REV. P1.1.2 GENERAL DESCRIPTION The XRT72L58 Octal DS3/E3 Framer is designed to accept “User Data” from the Terminal Equipment and insert this data into the “payload” bit-fields within an

dmo 365 r

Abstract: datasheet relay NAIS 5v 5 pin NAIS Relay 5v bi directional dc motor speed controller NAIS 210 NAIS 210 RELAY 5v relay nais 5 pin data sheet DS3-M13 sha t90 T79 code marking
Contextual Info: áç XRT72L53 PRELIMINARY THREE CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER FEBRUARY 2001 REV. P1.1.7 GENERAL DESCRIPTION The XRT72L53, 3 Channel DS3/E3 Framer IC is designed to accept User Data from the Terminal Equipment and insert this data into the Payload bit-fields

GR-253-CORE

Abstract: GR-499-CORE PE-65966 PE-65967 PE-68629 T3001 XRT7300 XRT7300IV
Contextual Info: XRT7300 JBTEXAR E3/DS3/STS-1 Line Interface Unit Septem ber 1999-2 FEATURES • Single-chip Transmit and Receive Line Interface IC for E3 34.368Mbps , DS3 (44.736Mbps) and SONET STS-1 (51,84Mbps) Applications Transmit Interface Characteristics • Accepts Either Single Rail or Dual Rail Data

Contextual Info: DATA SHEET Communications T3/STS-1/E3 XRT7300 DS3/E3/STS-1 Line Interface Unit Exar's XRT7300 DS3/E3/STS-1 transceiver is an integrated solution which combines and enhances the present XRT7295/XRT7298 two-chip solution. The device contains both the receiver and transmitter to support the data rates at DS3 44.736Mbps , E3 (34.368Mbps)

Contextual Info: XRT7300 E3/DS3/STS-1 Line Interface Unit September 1999-2 FEATURES l Single-chip Transmit and Receive Line Interface IC for E3 34.368Mbps , DS3 (44.736Mbps) and SONET STS-1 (51.84Mbps) Applications l l Transmit Interface Characteristics l Accepts Either Single Rail or Dual Rail Data

Contextual Info: áç XRT7300 E3/DS3/STS-1 LINE INTERFACE UNIT SEPTEMBER 2000 REV. 1.0.7 FEATURES • Meets E3/DS3/STS-1 Jitter Tolerance Requirements GENERAL DESCRIPTION The XRT7300 DS3/E3/STS-1 Line Interface Unit is designed to be used in DS3, E3 or SONET STS-1 applications and consists of a line transmitter and receiver integrated on a single chip.

dmo 465

Abstract: iC 458 datasheet relay NAIS 5v 5 pin M25-A dmo 365 dmo 365 r NAIS 210 RELAY NAIS Relay 5v DS3-M13 XRT72L56
Contextual Info: áç XRT72L56 PRELIMINARY SIX CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER JANUARY 2001 REV. P1.1.2 GENERAL DESCRIPTION The Microprocessor Interface is used to configure the Framer in different operating modes and monitor the performance of the Framer. The XRT72L56, 6 Channel DS3/E3 Framer is designed to accept “User Data” from the Terminal

Contextual Info: XRT7300 E3/DS3/STS-1 Line Interface Unit m t FEATURES • Single-chip Transmit and Receive Line Interface 1C for E3 34.368Mbps , DS3 (44.736Mbps) and SONET STS-1 (51,84Mbps) Applications Transmit Interface Characteristics • Accepts Either Single Rail or Dual Rail Data

NAIS 210 RELAY

Abstract: ic 393 k 4213 0X13 DS3-M13 XRT72L52
Contextual Info: áç XRT72L52 PRELIMINARY TWO CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER JANUARY 2001 REV. P1.1.2 GENERAL DESCRIPTION The XRT72L52, 2 Channel DS3/E3 Framer IC is designed to accept “User Data” from the Terminal Equipment and insert this data into the “payload” bitfields within an “outbound” DS3/E3 Data Stream. Further, the Framer IC is also designed to receive an “inbound” DS3/E3 Data Stream from the Remote Terminal Equipment and extract out the “User Data”.

XRT7300IV

Abstract: HDB3 schematic 0X00 GR-253-CORE GR-499-CORE XRT7300 HDB3 coaxial link LINE25 13E312
Contextual Info: áç XRT7300 E3/DS3/STS-1 LINE INTERFACE UNIT AUGUST 2000 REV. 1.0.6 GENERAL DESCRIPTION The XRT7300 DS3/E3/STS-1 Line Interface Unit is designed to be used in DS3, E3 or SONET STS-1 applications and consists of a line transmitter and receiver integrated on a single chip.

Contextual Info: I ABOUT EXAR I PRODUCTS I INDEX I SALES INFORMATION I INFORMATION REQUEST I SEARCH I HELP I DS3/E3 Product Selector Guide DS3/E3 Products DS3/E3 Line Interfaces Part No. #of Channels Data Rates Clock Recovery Temp Range Operating Power Supply Max Current Package s

225feet

Contextual Info: XRT7300 E3/DS3/STS-1 LINE INTERFACE UNIT MAY 2011 REV. 1.1.2 GENERAL DESCRIPTION FEATURES • Meets E3/DS3/STS-1 Jitter Tolerance Requirements The XRT7300 DS3/E3/STS-1 Line Interface Unit is designed to be used in DS3, E3 or SONET STS-1 applications and consists of a line transmitter and receiver integrated on a single chip.

Contextual Info: XRT7300 E3/DS3/STS-1 Line Interface Unit January 2000 FEATURES l Single-chip Transmit and Receive Line Interface IC for E3 34.368Mbps , DS3 (44.736Mbps) and SONET STS-1 (51.84Mbps) Applications l l Transmit Interface Characteristics l Accepts Either Single Rail or Dual Rail Data