XRT7302 Search Results

Contextual Info:  XRT7302 PRELIMINARY 2 CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT SEPTEMBER 1999 REV. 1.0.0 GENERAL DESCRIPTION APPLICATIONS The XRT7302 Dual Channel E3/DS3/STS-1 Transceiver IC consists of two fully integrated transmitter and receiver line transceiver blocks that are designed

HDB3 AMI ENCODER DECODER

Abstract: pulse transformer 400C 650C 850C GR-253-CORE GR-499-CORE XRT7302
Contextual Info: áç XRT7302 2 CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT SEPTEMBER 2000 REV. 1.1.6 GENERAL DESCRIPTION FEATURES The XRT7302 Dual Channel E3/DS3/STS-1 Transceiver IC consists of two fully integrated transmitter and receiver line transceivers designed for E3, DS3

Contextual Info: áç XRT7302 2 CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT FEBRUARY 2000 REV. 1.1.1 GENERAL DESCRIPTION APPLICATIONS The XRT7302 Dual Channel E3/DS3/STS-1 Transceiver IC consists of two fully integrated transmitter and receiver line transceivers designed for E3, DS3

CR10

Abstract: GR-253-CORE GR-499-CORE XRT7302
Contextual Info: áç XRT7302 2 CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT AUGUST 2000 REV. 1.1.5 • Digital Cross Connect Systems GENERAL DESCRIPTION • CSU/DSU Equipment The XRT7302 Dual Channel E3/DS3/STS-1 Transceiver IC consists of two fully integrated transmitter and receiver line transceivers designed for E3, DS3

TR-NWT000499

Contextual Info: DATA SHEET Communications XRT7302 Two Channel E3, DS3, STS-1 Line Interface Unit Features • Meets E3/DS3/STS-1 jitter tolerance requirements • Contains a 4-wire microprocessor serial interface • Full loop-back capacity • Transmit and receive power down modes

Contextual Info:
 XRT7302 PRELIMINARY 2 CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT NOVEMBER 1999 REV. 1.0.2 GENERAL DESCRIPTION APPLICATIONS The XRT7302 Dual Channel E3/DS3/STS-1 Transceiver IC consists of two fully integrated transmitter and receiver line transceiver blocks that are designed

Contextual Info: DATA SHEET Communications T3/STS-1/E3 XRT7302 2 Channel E3, DS3, STS-1 Line Interface Unit Features • Meets E3/DS3/STS-1 jitter tolerance requirements • Contains a 4-wire microprocessor serial interface • Full loop-back capacity • Transmit and receive power down modes

Contextual Info:  XRT7302 PRELIMINARY 2 CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT SEPTEMBER 1999 REV. 1.0.1 GENERAL DESCRIPTION APPLICATIONS The XRT7302 Dual Channel E3/DS3/STS-1 Transceiver IC consists of two fully integrated transmitter and receiver line transceiver blocks that are designed

OM02 optical

Abstract: om02 pe-68629 GR-253-CORE GR-499-CORE XRT7302 T-25W
Contextual Info: nsr EX4R XRT7302 2 CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT NOVEMBER 1999 REV. 1.0.2 GENERAL DESCRIPTION APPLICATIONS The XRT7302 Dual Channel E3/DS3/STS-1 Trans­ ceiver IC consists of two fully integrated transmitter and receiver line transceiver blocks that are designed

0X00

Abstract: CR10 GR-499-CORE XRT7302
Contextual Info: áç XRT7302 2 CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT FEBRUARY 2000 REV. 1.1.0 GENERAL DESCRIPTION APPLICATIONS The XRT7302 Dual Channel E3/DS3/STS-1 Transceiver IC consists of two fully integrated transmitter and receiver line transceivers designed for E3, DS3

r4363

Abstract: CP Clare RELAY dmo 465 IC 404
Contextual Info: áç XRT72L53 PRELIMINARY THREE CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER JANUARY 2001 REV. P1.1.6 GENERAL DESCRIPTION The XRT72L53, 3 Channel DS3/E3 Framer IC is designed to accept User Data from the Terminal Equipment and insert this data into the Payload bit-fields

B628

Abstract: datasheet relay NAIS 5v 5 pin iC 458 XRT72L58 "Encoder IC" NAIS 210 RELAY octal tri state buffer ic DS3-M13 XRT72L58IB TTB-11
Contextual Info: áç XRT72L58 PRELIMINARY EIGHT CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER JANUARY 2001 REV. P1.1.2 GENERAL DESCRIPTION The XRT72L58 Octal DS3/E3 Framer is designed to accept “User Data” from the Terminal Equipment and insert this data into the “payload” bit-fields within an

dmo 365 r

Abstract: datasheet relay NAIS 5v 5 pin NAIS Relay 5v bi directional dc motor speed controller NAIS 210 NAIS 210 RELAY 5v relay nais 5 pin data sheet DS3-M13 sha t90 T79 code marking
Contextual Info: áç XRT72L53 PRELIMINARY THREE CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER FEBRUARY 2001 REV. P1.1.7 GENERAL DESCRIPTION The XRT72L53, 3 Channel DS3/E3 Framer IC is designed to accept User Data from the Terminal Equipment and insert this data into the Payload bit-fields

T3001

Abstract: t606 PE-65968
Contextual Info: T3/DS3/E3/STS-1 TRANSFORMERS Eight Transformers Designed for T3, DS3, E3 and STS-1 Interface Eight transformers in a surface mount package Models matched to leading transceiver ICs Return loss meets requirements of G.703 Recognized by UL1950 Isolation voltage: 1500 Vrms

EXAR XR2209

Abstract: XR16C2850 XR68C681 XR88C192 ST16C650A
Contextual Info: ABOUT EXAR I PRODUCTS I INDEX I SALES INFO I INFORMATION REQUEST I SEARCH I HELP I Exar Products Alphanumeric Index To access product information and data sheets, click on the part number below. ST16C1450 ST16C1451 ST16C1550 ST16C1551 ST16C2450 ST16C2550 ST16C2552

T3001

Abstract: T3020 T3020T TX3025 TX3026 PE-65 PE-65966
Contextual Info: T3/DS3/E3/STS-1 TRANSFORMERS Dual SMT, Extended Temperature Range Dual SMT package contains both transmit and receive transformers Operating temperature of -40°C to +85°C Models matched to leading transceiver ICs Return loss meets requirements of G.703 1500 Vrms isolation per UL1459 and UL1950

dmo 465

Abstract: iC 458 datasheet relay NAIS 5v 5 pin M25-A dmo 365 dmo 365 r NAIS 210 RELAY NAIS Relay 5v DS3-M13 XRT72L56
Contextual Info: áç XRT72L56 PRELIMINARY SIX CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER JANUARY 2001 REV. P1.1.2 GENERAL DESCRIPTION The Microprocessor Interface is used to configure the Framer in different operating modes and monitor the performance of the Framer. The XRT72L56, 6 Channel DS3/E3 Framer is designed to accept “User Data” from the Terminal

role of microprocessor

Abstract: DS3 multiplex demultiplex 850C CR21 GR-499-CORE TBR24 XRT71D00 XRT7300 E3 multiplex demultiplex
Contextual Info: áç XRT71D00 PRELIMINARY DS3/E3 JITTER ATTENUATOR IC FEBRUARY 2000 REV. P1.0.0 GENERAL DESCRIPTION • Selectable buffer size of 16 and 32 bits The XRT71D00 is a single chip IC which accepts “jittery” clock and data signals from a LIU, internally reduces and smooths the clock and data jitter, then ouputs the smoothed data to the Terminal Equipment.

Contextual Info: DATA SHEET Communications XRT73L03A Three Channel E3/DS3/STS-1 Line Interface Unit Features • Clock-recovery and data re-timing • Optional receive line equalizer • Transmit pulse-compliant with ITU-T • Frequency lock detector • Meets E3/DS3/STS-1 jitter tolerance requirements

dmo 365 r

Abstract: dmo 365 dmo 465 datasheet relay NAIS 5v 5 pin marx and generator NAIS 210 RELAY NAIS Relay 5v DS3-M13 XRT72L52 XRT72L52IQ
Contextual Info: XRT72L52 TWO CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER OCTOBER 2006 REV. 1.0.3 GENERAL DESCRIPTION The XRT72L52, Two Channel DS3/E3 Framer IC is designed to accept user data from the Terminal Equipment and insert this data into the payload bitfields within an outbound DS3/E3 Data Stream.

NAIS 210 RELAY

Abstract: ic 393 k 4213 0X13 DS3-M13 XRT72L52
Contextual Info: áç XRT72L52 PRELIMINARY TWO CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER JANUARY 2001 REV. P1.1.2 GENERAL DESCRIPTION The XRT72L52, 2 Channel DS3/E3 Framer IC is designed to accept “User Data” from the Terminal Equipment and insert this data into the “payload” bitfields within an “outbound” DS3/E3 Data Stream. Further, the Framer IC is also designed to receive an “inbound” DS3/E3 Data Stream from the Remote Terminal Equipment and extract out the “User Data”.

Contextual Info: I ABOUT EXAR I PRODUCTS I INDEX I SALES INFORMATION I INFORMATION REQUEST I SEARCH I HELP I DS3/E3 Product Selector Guide DS3/E3 Products DS3/E3 Line Interfaces Part No. #of Channels Data Rates Clock Recovery Temp Range Operating Power Supply Max Current Package s

Contextual Info: áç XRT72L50 PRELIMINARY SINGLE CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER JANUARY 2001 REV. P1.1.3 GENERAL DESCRIPTION The XRT72L50, single Channel DS3/E3 Framer IC is designed to accept “User Data” from the Terminal Equipment and insert this data into the “payload” bitfields within an “outbound” DS3/E3 Data Stream. Further, the Framer IC is also designed to receive an “inbound” DS3/E3 Data Stream from the Remote Terminal Equipment and extract out the “User Data”.

Rx1302

Abstract: r4363 dmo 265
Contextual Info: áç XRT72L50 PRELIMINARY SINGLE CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER JANUARY 2001 REV. P1.1.2 GENERAL DESCRIPTION The XRT72L50, single Channel DS3/E3 Framer IC is designed to accept “User Data” from the Terminal Equipment and insert this data into the “payload” bitfields within an “outbound” DS3/E3 Data Stream. Further, the Framer IC is also designed to receive an “inbound” DS3/E3 Data Stream from the Remote Terminal Equipment and extract out the “User Data”.