Y7C1032 Search Results

80486 microprocessor block diagram and pin diagram

Abstract: WCSS0418V1F WCSS0418V1F-117
Contextual Info: Y7C1032 WCSS0418V1F 256K x 18 Synchronous 3.3V Cache RAM Features Functional Description • Supports 117-MHz microprocessor cache systems with zero wait states • 256K by 18 common I/O • Fast clock-to-output times — 7.5 ns 117-MHz version • Two-bit wrap-around counter supporting either interleaved or linear burst sequence

adsh 13

Abstract: intel 80486 CY7C1031 CY7C1032 VXXXX
Contextual Info: CY7C1031 Y7C1032 PRELIMINARY ?CYPRESS Functional Description continued Single Write Accesses Initiated by ADSP This access is initiated when the following conditions are satisfied at clock rise: (1) is LOW and (2) AD5P is LOW. ADSP-triggered write cycles are completed in two clock periods. The address at Ao

Contextual Info: CY7C1031 Y7C1032 PRELIMINARY ?CYPRESS Functional Description continued Single Write Accesses Initiated by ADSP This access is initiated when the following conditions are satisfied at clock rise: (1) is LOW and (2) AD5P is LOW. ADSP-triggered write cycles are completed in two clock periods. The address at Ao