ZL30111 Search Results

ZL30111

Abstract: ZL30111QDG ZL30111QDG1
Contextual Info: ZL30111 POTS Line Card PLL Data Sheet Features January 2007 • Synchronizes to 8 kHz, 2.048 MHz, 8.192 MHz or 19.44 MHz input • Provides a range of clock outputs: 2.048 MHz, 4.096 MHz and 8.192 MHz • Provides 2 styles of 8 kHz framing pulses • Automatic entry and exit from freerun mode on

ZL30111

Abstract: ZL30111QDG ZL30111QDG1 GPON block diagram
Contextual Info: ZL30111 POTS Line Card PLL Data Sheet Features January 2007 • Synchronizes to 8 kHz, 2.048 MHz, 8.192 MHz or 19.44 MHz input • Provides a range of clock outputs: 2.048 MHz, 4.096 MHz and 8.192 MHz • Provides 2 styles of 8 kHz framing pulses • Automatic entry and exit from freerun mode on

ZL30100

Abstract: ZL30101 ZL30102 ZL30105 ZL30106 ZL30108 ZL30109 ZL30110 ZL30111 ZL30112
Contextual Info: ZLAN-178 Synchronizer Power Supply Decoupling and Layout Practices Application Note Contents November 2007 1.0 Introduction 2.0 Power Supply Decoupling for 64 Pin Devices 3.0 Power Supply Decoupling for 32 Pin Devices 4.0 Common Recommended Layout Practices

Contextual Info: ZLAN-179 Low Jitter Synchronizer Power Supply Decoupling and Layout Practices Application Note Contents December 2005 1.0 Introduction 2.0 Power Supply Decoupling and Layout Practices 1.0 • Each power island should have a bulk cap of at least 10 µF with very low ESR. Ceramic provides