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    ZX74AHCT Search Results

    ZX74AHCT Datasheets (146)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF PDF Size Page count
    ZX74AHCT00J
    		Zytrex Quad 2-Input NAND Gates Scan PDF 554.05KB 6
    ZX74AHCT00N
    		Zytrex Quad 2-Input NAND Gates Scan PDF 554.05KB 6
    ZX74AHCT01J
    		Zytrex Quad 2-input NAND Gates with Open Drain Outputs Scan PDF 553.95KB 6
    ZX74AHCT01N
    		Zytrex Quad 2-input NAND Gates with Open Drain Outputs Scan PDF 553.95KB 6
    ZX74AHCT02J
    		Zytrex Quad 2-Input NOR Gates Scan PDF 551.98KB 6
    ZX74AHCT02N
    		Zytrex Quad 2-Input NOR Gates Scan PDF 551.98KB 6
    ZX74AHCT03J
    		Zytrex Quad 2-Input NAND Gates with Open Drain Outputs Scan PDF 552.72KB 6
    ZX74AHCT03N
    		Zytrex Quad 2-Input NAND Gates with Open Drain Outputs Scan PDF 552.72KB 6
    ZX74AHCT04J
    		Zytrex Hex Inverters Scan PDF 554.84KB 6
    ZX74AHCT04N
    		Zytrex Hex Inverters Scan PDF 554.84KB 6
    ZX74AHCT05J
    		Zytrex Hex Inverters with Open Drain Outputs Scan PDF 556.21KB 6
    ZX74AHCT05N
    		Zytrex Hex Inverters with Open Drain Outputs Scan PDF 556.21KB 6
    ZX74AHCT08J
    		Zytrex Quad 2-Input AND Gate Scan PDF 554.61KB 6
    ZX74AHCT08N
    		Zytrex Quad 2-Input AND Gate Scan PDF 554.61KB 6
    ZX74AHCT09J
    		Zytrex Quad 2-Input AND Gates with Open Drain Outputs Scan PDF 554.43KB 6
    ZX74AHCT09N
    		Zytrex Quad 2-Input AND Gates with Open Drain Outputs Scan PDF 554.43KB 6
    ZX74AHCT107J
    		Zytrex Dual J-K Negative Edge Triggered Flip-Flop with Clear Scan PDF 589.87KB 7
    ZX74AHCT107N
    		Zytrex Dual J-K Negative Edge Triggered Flip-Flop with Clear Scan PDF 589.87KB 7
    ZX74AHCT109J
    		Zytrex Dual J-K Positive Edge Triggered Flip-Flops with Preset and Clear Scan PDF 586.23KB 7
    ZX74AHCT109N
    		Zytrex Dual J-K Positive Edge Triggered Flip-Flops with Preset and Clear Scan PDF 586.23KB 7
    ...

    ZX74AHCT Datasheets Context Search

    Catalog Datasheet Type Document Tags PDF

    74AHCT

    Abstract: AHCT193
    Contextual Info: Z y tre x ZX54AHCT ZX74AHCT 193 Synchronous 4-Bit Up/Down Binary Counters with Dual Clock February 1965 OBJECTIVE SPECIFICATIONS Features Description m Look-ahead circuitry enhances cascaded These are high-speed synchronous reversible 4-bit bina­ ry counters. Synchronous operation is provided by hav­


    OCR Scan     		ZX74AHCT 54/74ALS 74AHCT: 54AHCT: 74AHCT AHCT193 PDF

    diode Rl 257

    Abstract: Zytrex 74ahct AHCT257 54AHCT Zytrex 74AHCT PF1016
    Contextual Info: Zvtrex ZXS4AHCT ZX74AHCT 257 ^ 258 Quad 2-Line to 1-Line Data Selector/ Multiplexers with 3-State Outputs February 1985 OBJECTIVE SPECIFICATIONS Description Features Function, pin-out, speed and drive compatibility with 54/74ALS logic family Low power consumption characteristic of


    OCR Scan     		ZX74AHCT 54/74ALS 74AHCT: 54AHCT: diode Rl 257 Zytrex 74ahct AHCT257 54AHCT Zytrex 74AHCT PF1016 PDF

    74AHCT

    Abstract: AHCT174
    Contextual Info: Mrex ZX54AHCT g ZX74AHCT I February 1985 g M C L ZX54AHCT § ZX74AHCT § f # Hex/Quad D-Type Flip-Flops with Clear OBJECTIVE SPECIFICATIONS Features Description • Function, pin-out, speed and drive compatibility with 54/74ALS logic family The '174 contains six, and the '175 contains tour D-type


    OCR Scan     		ZX74AHCT 54/74ALS 74AHCT: 54AHCT: 74AHCT AHCT174 PDF

    74AHCT

    Contextual Info: Z y t r e ZX54AHCT § ZX74AHCT M x Ê Ê Triple 3-Input AND Gate^ February 1985 OBJECTIVE SPECIFICATIONS Features Description • Function, pln-out, speed and drive compatibility with 54/74ALS logic family These devices contain three independent 3-input AND


    OCR Scan     		ZX54AHCT ZX74AHCT 54/74ALS 74AHCT: 54AHCT: 74AHCT PDF

    74AHCT

    Contextual Info: Z v tre x ZX54AHCT § ZX74AHCT M February 1985 g # _ % 4-Bit D-Type Registers with 3-State Outputs OBJECTIVE SPECIFICATIONS Features Description • Gated output control lines for enabling or disabling the outputs These 4-bit registers contain D-type flip-flops with 3-state


    OCR Scan     		ZX54AHCT ZX74AHCT 54/74ALS 74AHCT: 54AHCT: 74AHCT PDF

    74AHCT

    Contextual Info: ZWreat ZX54AH C T _ ^ ZX74AHCT February 1985 7M _0^ Octal D-Type Transparent Latches with 3-State Outputs OBJECTIVE SPECIFICATIONS Features Description • 8 latches in a single package The ’373 consists of 8 high-speed D-type latches cou­ pled to 3-state output buffers with high drive current ca­


    OCR Scan     		54/74ALS 74AHCT: 54AHCT: ZX54AHCT ZX74AHCT 74AHCT PDF

    150a gto

    Abstract: 198S 74AHCT
    Contextual Info: Zvtrex # _% ZX54AHCT ZX74AHCT M February 1985 Dual 1-of-4 Decoder/Multiplexers OBJECTIVE SPECIFICATIONS Features Description • Designed specifically for high-speed memory decoders and data transmission systems These devices are designed to be used in high-perform ­


    OCR Scan     		ZX54AHCT ZX74AHCT 54/74ALS 74AHCT: 54AHCT: ahcti39 74AHCT 54AHCT Ta--55Â 150a gto 198S PDF

    74AHCT

    Abstract: PF1016
    Contextual Info: Zvtrex ZX54AHCT ZX74AHCT February 1985 534 Octal D-Type Flip-Flops with 3-State Outputs OBJECTIVE SPECIFICATIONS Features Description • Function, pln-out, speed and drive compatibility with 54/74ALS logic family ■ Low power consumption characteristic of


    OCR Scan     		ZX54AHCT ZX74AHCT 54/74ALS 74AHCT: 54AHCT: 74AHCT PF1016 PDF

    74AHCT

    Contextual Info: Zytrex ZXS4AHCT ZX74AHCT Dual 2-to-4 Line Decoder/Multiplexers F e b ru a ry 1 9 8 5 O B J E C T IV E S P E C IF IC A T IO N S 155 . Features Description • Typical applications: Dual 2-to-4 line decoder Dual 1-to-4 line demultiplexer 3-to-8 line decoder


    OCR Scan     		ZX54AHCT ZX74AHCT 54/74ALS 74AHCT: 54AHCT: ahcti55 74AHCT 54AHCT PDF

    74AHCT

    Contextual Info: Zytrex ZXS4AHCT ZX74AHCT February 1985 « % Q u ad 2 -fn p u t O R GatèsL OBJECTIVE SPECIFICATIONS Features Description • Function, pin-out, speed and drive compatibility with 54/74ALS logic family These devices contain four independent 2-input OR gates. They perform the Boolean functions Y = A + B


    OCR Scan     		ZX54AHCT ZX74AHCT 54/74ALS 74AHCT: 54AHCT: 74AHCT PDF

    zytrex

    Abstract: 74AHCT
    Contextual Info: Sftmx ZX54AHCT ZX74AHCT February 1985 OBJECTIVE SPECIFICATIONS 157 sag158 Quad 2-Line to 1-Line Data Se/ector/Muitipiexers _ Features Description • Function, pin-out, speed and drive compatibility with 54/74ALS logic family These are data selector/m ultiplexers which select a 4-bit


    OCR Scan     		ZX54AH ZX74AHCT 54/74ALS 74AHCT: 54AHCT: AHCTi57 AHCTi58 74AHCT 54AHCT Cl-50 zytrex PDF

    AHCT148

    Abstract: 74AHCT
    Contextual Info: Zvtrex ZX54AHCT § ZX74AHCT M February 1985 M 8-Line to 3-Line Priority Encoders OBJECTIVE SPECIFICATIONS _ Features Description • Encodes eight data lines in priority The '148 provides three bits of binary coded output rep­ resenting the position of the highest order active input,


    OCR Scan     		ZX54AHCT ZX74AHCT 54/74ALS 74AHCT: 54AHCT: AHCT148 74AHCT PDF

    UFN 432

    Abstract: 74AHCT
    Contextual Info: Zvtrex ZX54AHCT ZX74AHCT OBJECTIVE SPECIFICATIONS Features Description • Multiplexed I/O ports provides improved bit density These eight-bit universal registers feature multiplexed I/O ports to achieve full eight-bit data handling. Two function-select inputs and two output-control Inputs can


    OCR Scan     		ZX54AHCT ZX74AHCT 54/74ALS UFN 432 74AHCT PDF

    8D-13

    Abstract: 74AHCT
    Contextual Info: Zytrex ZXS4AHCT ZX74AHCT 374 Octal D-Type Flip-Flops with 3-State Outputs February 1985 OBJECTIVE SPECIFICATIONS Features Description m Function, pin-out, speed and drive • Low power consumption characteristic of CMOS The ’374 consists of 8 high-speed D-type edge-triggered


    OCR Scan     		ZX54AHCT ZX74AHCT 54/74ALS 74AHCT: 54AHCT: 8D-13 74AHCT PDF

    74AHCT

    Abstract: 0C17G
    Contextual Info: Zvtrex ZXS4AHCT n§ ' #oS ZX74AHCT m t M m Dual J-K Negative-Edge-Triggered Flip-Flops with Preset and Clear February 1985 OBJECTIVE SPECIFICATIONS Features Description • Function, pin-out, speed and drive compatibility with 54/74ALS logic family ■ Characterized for operation over Industrial


    OCR Scan     		ZX74AHCT 54/74ALS 74AHCT: 54AHCT: 74AHCT 0C17G PDF

    74AHCT

    Contextual Info: Zytrex ZXS4AHCT ZX74AHCT 05 Hex Inverters with Open-Drain Outputs February 1985 OBJECTIVE SPECIFICATIONS Features Description • Function, pln-out, speed and drive compatibility with 54/74ALS logic family These devices contain six independent inverters with


    OCR Scan     		ZX54AHCT ZX74AHCT 54/74ALS 74AHCT: 54AHCT: 74AHCT PDF

    Zytrex

    Abstract: 74AHCT Zytrex 74ahct
    Contextual Info: Zyfrex ZX54AHCT ZX74AHCT Octal Buffers and Line Drivers with 3-State Outputs February 1985 OBJECTIVE SPECIFICATIONS 540 SS&541- ' Features Description m Function, pln-out, speed and drive The ’540 and ’541 are general purpose high-speed octal tine drivers/buffers with 3-state outputs. The inputs and


    OCR Scan     		ZX54AHCT ZX74AHCT 54/74ALS 74AHCT: 54AHCT: Zytrex 74AHCT Zytrex 74ahct PDF

    74AHCT

    Abstract: 74als power consumption Zytrex
    Contextual Info: Zytrex _ Fe brua ry 1985 ZXS4AHCT ZX74AHCT # # S m^ Dual Retriggerable Monostable Multivibrator OBJECTIVE SPECIFICATIONS Features Description • Simple pulse width formula T = RC The '123 consists of two independent monostable multi­ vibrators that feature both a negative, A, and a positive,


    OCR Scan     		54/74ALS 74AHCT: 54AHCT: ZX74AHCT 74AHCT 74als power consumption Zytrex PDF

    74AHCT

    Contextual Info: Zvtrex ZX54AHCT ZX74AHCT f/ #_0^ Quad 2-Input NAND Gates with Open-Drain Outputs February 1985 OBJECTIVE SPECIFICATIONS Features Description • Function, pin-out, speed and drive compatibility with 54/74ALS logic family These devices contain four independent 2-input NAN D


    OCR Scan     		ZX54AHCT ZX74AHCT 54/74ALS 74AHCT: 54AHCT: 74AHCT PDF

    74AHCT

    Abstract: TTL Schmitt-Trigger cmos BC5-10
    Contextual Info: Zytrex ZX54AHCT ZX74AHCT February 1985 121 Monostable Multivibrators with Schmitt-Trigger inputs OBJECTIVE SPECIFICATIONS Features Description • Schmitt-trigger for slow input transitions ■ Internal timing resistor These multivibrators feature dual negative-transition-trig­


    OCR Scan     		ZX54AHCT ZX74AHCT 54/74ALS 74AHCT: 54AHCT: 74AHCT TTL Schmitt-Trigger cmos BC5-10 PDF

    74AHCT

    Contextual Info: Z y tr e x ZXS4AHCT ZX74AHCT 165 8-Bit Parallel-ln/Serial Out Shift Registers F ebrua ry 1985 OBJECTIVE SPECIFICATIONS Features Description • Complementary outputs These are high-speed 8-bit parallel-load or seriai-in shift registers with complem entary serial outputs available


    OCR Scan     		ZX74AHCT 54/74ALS 74AHCT: 54AHCT: 74AHCT PDF

    74AHCT

    Abstract: Z648 ahct646
    Contextual Info: ZXS4AHCT ZX74AHCT F ebrua ry 1985 £ L Octal 3-State Bus Transceivers with Registers OBJECTIVE SPECIFICATIONS , 2XS4AHCT ZX74AHCT Features Description • 8 bi-directional data paths The '646 and ’648 are bi-directional bus transceivers with D-type flip-flops and control circuitry to facilitate high


    OCR Scan     		ZX74AHCT 24-pin 54/74ALS 74AHCT: 54AHCT: 74AHCT Z648 ahct646 PDF

    ahct245

    Abstract: 74AHCT Zytrex
    Contextual Info: Zyfrex ZX54AHCT ZX74AHCT M February 1985 ^ M Octal Bus Transceivers with 3-State Outputs OBJECTIVE SPECIFICATIONS Features Description • Function, pin-out, speed and drive compatibility with 54/74ALS logic family These high-speed octal bus transceivers are designed


    OCR Scan     		ZX54AHCT ZX74AHCT 54/74ALS 74AHCT: 54AHCT: ahct245 74AHCT Zytrex PDF

    74AHCT

    Contextual Info: Z y f r e ZX54AHCT ZX74AHCT M x February 1985 8-Bit Parailel-ln/Serial-Out Shift Registers with Clear OBJECTIVE SPECIFICATIONS Features Description • Synchronous load These devices feature parallel-in or serial-in, serial-out registers, gated clock inputs and an overriding clear in­


    OCR Scan     		ZX74AHCT 54/74ALS 74AHCT: 54AHCT: 74AHCT PDF