A12A 24 Search Results

Contextual Info: XS1-A12A-128-FB217 Datasheet 2013/12/09 XMOS 2013, All Rights Reserved Document Number: X9253, XS1-A12A-128-FB217 Datasheet 1 Table of Contents 1 xCORE Multicore Microcontrollers . . 2 XS1-A12A-128-FB217 Features . . . 3 Pin Configuration . . . . . . . . . . .

203d6

Contextual Info: Bowmar/lHfhite 128K x 8 BIT SRAM C8-M128 SERIES Technology PIN DIAGRAM NC □ 1 A16 C 2 A14 □ A12 □ A7 32 3 V c c 31 □ A 15 3 30 3 N C 4 24 □ W E c 5 6 28 3 A 13 27 □ A 8 A6 c A5 c A4 A3 c 8 c 9 c 10 A1 □ 11 AD □ 12 21 DO □ 13 20 3 D6 D1 □

Contextual Info: 3ÔE D MICRON TECHNOLOGY INC blllSM'l QGQ3G2Q 1 • MRN r - % - n - ìz aìa r CACHE DATA STATIC RAM DUAL 4Kx 18 SRAM, SINGLE 8Kx 18 SRAM CONFIGURABLE CACHE DATA SRAM FEATURES PIN ASSIG N M EN T Top View • Automatic WRITE cycle completion • Operates as two 4K x 18 SRAMs with common

A17a

Abstract: diode A14A a43a SMA33CA A6.5CA SMA12CA a13a A45A A78A A18A marking
Contextual Info: P4SMA series Compact Technology Peak power dissipation Breakdown Voltage Transient Voltage Suppressors 400W 5.0~ 190V SMA FEATURES Constructed with Glass Passivated Die Low inductance Excellent clamping capability Uni and bidirectional unit Very fast response time

A91A

Abstract: A18A a39a mur 4520 A30A A11A a68a a75a btp 506 A36A
Contextual Info: TPSMA6.8 THRU TPSMA43A AUTOMOTIVE SURFACE MOUNT TRANSIENT VOLTAGE SUPPRESSOR VOLTAGE - 6 . 8 - 4 3 . 0 Volts 400 Watt Peak Pulse Power_ _FEATURES D O -2 1 4 A C — ' t I .0 7 8 1 .3 8 . 0 9 0 ( 2 .2 9 ) V L -_ _ J

DUP1

Contextual Info: FIJCRON TECHNOLOGY INC MICRON SSE T> • blllSMT DD037M3 DT4 ■ URN M T56C 2818 8 K x 18, DUAL 4 K x 18 C A CH E DATA SRAM ■ - ; CACHE DATA -0 4 - q q a i i

mt90c

Abstract: MT56C0816EJ-25 mt56c0816
Contextual Info: MICRON TECHNOLOGY INC SSE T> WÊ blllSHT 0 0 0 3 ^ 3 7HT B U R N MT56C0816 8K x 16, DUAL 4K x 16 CACHE DATA SRAM V H C Z R O N CACHE DATA SRAM SINGLE 8Kx 16 SRAM, DUAL4KX16 SRAM CONFIGURABLE CACHE DATA SRAM FEATURES • Operates as two 4K x 16 SRAMs with common

Contextual Info: M IC R O N * MT56C2818 8 K x 18, DUAL 4 K x 18 CACHE DATA SRAM CACHE DATA SRAM SINGLE 8Kx18 SRAM, DUAL 4KX18SRAM CONFIGURABLE CACHE DATA SRAM FEATURES PIN ASSIGNMENT Top View • A u tom atic W RITE cycle com pletion • O p erates a s tw o 4K x 18 SR A M s w ith com m on

MARKING CODE LT DO-214AC

Abstract: marking 15C SMA TVS IEC801-2 IEC801-4 P4SMA10CA P4SMA220CA p4sma75a
Contextual Info: P4SMA6.8A thru P4SMA220CA 5YMSEMI semicomductor Surface Mount Transient Voltage Suppressors Peak Pulse Power 400W Breakdown Voltage 6.8 to 220V Features_ ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦ P la s tic pa cka g e has U n d e rw rite rs L a b o ra to ry F lam m a bility

ATT7C314J

Contextual Info: iATsT Data Sheet November 1991 rMicroelectronics A TT7C 314J S ta tic , D u al-P o rt RAM 72K 8192 w ords x 9 b its Benefits Features • Full internal contention resolution transparent to the user ■ Word-size expansion capability ■ Parity bit available with 9-bit organization

Contextual Info: QS88180, Q QS88160 High-Speed CMOS Dual 4Kx16/18 SRAM with Latched Addresses QS88180 QS88160 FEATURES/BENEFITS • • • • Dual 4Kx18/16 allows 2-way set associative cache Byte enables for byte/Word read/write 20ns/25 ns/30ns/35 ns Taa Available in 52-pin PLCC

a13b 5 pin

Abstract: A13B AMB0480 diode A14A IDTAMB0480 DDR2-533 DDR2-667 ADVANCED COMMUNICATION DEVICES A12A a12b 5 pin
Contextual Info: IDTAMB0480 ADVANCED MEMORY BUFFER FOR FULLY BUFFERED DIMM COMMERCIAL TEMPERATURE RANGE ADVANCED MEMORY BUFFER FOR FULLY BUFFERED DIMM MODULES IDTAMB0480 PRODUCT BRIEF FEATURES: DESCRIPTION: • • • • • The fully buffered dual in-line memory module FB-DIMM is the next

Contextual Info: IDTAMB0480 ADVANCED MEMORY BUFFER FOR FULLY BUFFERED DIMM COMMERCIAL TEMPERATURE RANGE ADVANCED MEMORY BUFFER FOR FULLY BUFFERED DIMM MODULES DESCRIPTION: FEATURES: Advanced Memory Buffer for Fully buffered DIMMs 3.2 and 4 Gbit/s serial speeds DDR2-533 and 667 DRAM

Contextual Info: QS88180, Q QS88160 High-Speed CMOS Dual 4Kx16/18 SRAM with Latched Addresses QS88180 QS88160 FEATURES/BENEFITS • Dual 4Kx18/16 allows 2-way set associative cache • Byte enables for byte/word read/write • 20ns/25 ns/30ns/35 ns Taa • Available in 52-pin PLCC

5DOF

Abstract: A12U HY628400 HAB 20-S
Contextual Info: HY628400 Series » H Y U N D A I 512K X 8-bit CMOS SRAM PRELIMINARY DESCRIPTION The HY628400 is a high-speed, low power and 524,288x8-bits CMOS static RAM fabricated using Hyundai’s high performance twin tub CMOS process technology. This high reliability process coupled with innovative circuit

Contextual Info: QS88180, ô QS88160 High-Speed CMOS Dual 4Kx16/18 SRAM with Latched Addresses QS88180 QS88160 Preliminary FEATURES/BENEFITS • • • • • Dual 4Kx18/16 allows 2-way set associative cache Byte enables for byte/word read/write 20ns/25 ns/30ns/35 ns Taa commercial

R343C

Abstract: MIL-STD-883 Method 1019 UT28F256
Contextual Info: Military Standard Products UT28F256 Radiation-Hardened 32K x 8 PROM Preliminary Data Sheet UNITED TECHNOLOGIES MICROELECTRONICS CENTER May 1994 FEATURES □ Programmable, read-only, asynchronous, radiationhardened, 32K x 8 memory - Supported by industry standard programmers

AEB DP1

Abstract: 0588 82385 A12A D815
Contextual Info: Q S88180, Q QS88160 High-Speed CMOS Dual 4Kx16/18 SRAM with Latched Addresses QS88180 Q S 88160 Prelim inary FE A T U R E S /B E N E FIT S • • • • • Dual 4Kx18/16 allows 2-way set associative cache Byte enables for byte/word read/write 20ns/25 ns/30ns/35 ns Taa commercial

Contextual Info: 4<ÌE D P r e v ie w • SöböMSb DDGlObl 5 h 5 ■ MMHS I H I I f T M S e p te m b e r 1 9 9 0 NATRA M H S HM 65688 DATASHEET 16kx4 ULTIMATE CMOS SRAM FEATURES ACCESS TIME MILITARY/INDUSTRIAL : 45/55 ns max COMMERCIAL : 35/45 ns (max) VERY LOW POWER CONSUMPTION

Contextual Info: bEM'ìflSS 00SH2S3 MITSUBISHI LSIs 3D7 • M I T I M5M51008AP,FP,VP,RV-55L,-55LL 1048576-BIT 131072-WORD BY 8-BIT CM0S STATIC RAM DESCRIPTION The M 5 M 5 1 0 0 8 A P , FP, VP, RV are a 1 0 4 8 5 7 6 -b it CMOS PIN CONFIGURATION (TOP VIEW) static R A M organized as .131072 w ord by 8 - bit w hich are

A13B

Abstract: DQ17A-DQ0A A14B DQ4a DQ11A
Contextual Info: July 2004 Preliminary Information AS9C25512M2018L 2.5V 512K X 18 Synchronous Dual-port SRAM with 3.3V or 2.5V interface Features • True Dual-Port memory cells that allow simultaneous access of the same memory location • Organisation: 524,288 x 18 bits

A17a

Abstract: HY628400LLG55 HY628400LLG 6da6 HY628400LG A18A HY628400 tsop 338 IR 1A13 DA16
Contextual Info: HY628400 Series •HYUNDAI 512K X 8-bit CMOS SRAM PRELIMINARY DESCRIPTION The HY628400 is a high-speed, low power and 524,288x8-bits CMOS static RAM fabricated using Hyundai’s high performance twin tub CMOS process technology. This high reliability process coupled with innovative circuit

A011 transistor

Contextual Info: QS88180, QS88160 High-Speed CMOS Dual 4Kx16/18 SRAM with Latched Addresses Q 7 QS88180 Q S88160 Preliminary FEATURES/BENEFITS • • • • • Dual 4Kx18/16 allows 2-way set associative cache Byte enables 1or byte/word read/write 20ns/25 ns/30ns/35 ns Taa commercial

F0016

Contextual Info: “H Y U N D A I H Y 6 2 8 1 0 0 A S e r ie s 128K X 8-bit CMOS SRAM PRELIMINARY DESCRIPTION The HY628100A is a high-speed, low power and 131,072 x 8-bits CMOS static RAM fabricated using Hyundai’s high performance twin tub CMOS process technology. This high reliability process coupled with innovative circuit