A12IZ Search Results

Contextual Info: LH53517 FEATURES CMOS 512K 64K x 8 MROM PIN CONNECTIONS • 65,536 words x 8 bit organization • Access time: 150 ns (MAX.) TOP VIEW 28-PIN DIP 28-PIN SOP S • Low-power consumption: Operating: 165 mW (MAX.) A15C 1• N 28 □ V qc A12IZ 2 27 Zl a 14 a 7C

Contextual Info: CMOS 8M 1M x 8 MROM FEATURES • 1,048,576 words x 8 bit organization • Access time: 120 ns (MAX.) PIN CONNECTIONS 32-PIN DIP 32-PIN SOP TOP VIEW 1 • 32 Zl Vcc A ^ IZ 2 31 Zl a 18 A1 5 C 3 30 □ A12IZ 4 29 □ A 14 A7C 5 28 Zl a 13 Aig IZ • Power consumption:

a01494

Abstract: A19C Z3A18 ZDA17
Contextual Info: r z ^ T j S G S -T H O M S O N # . M28F841 IM 1 0 g [S [1 0 = [lO T (S M lB ( g S 8 Megabit (1 Meg x 8, Sector Erase) FLASH MEMORY PREUMI NARY DATA • SMALLS1ZE PLASTIC PACKAGES TSOP40 and S044 ■ MEMORY ERASE in SECTORS - 16 Sectors of 64K Bytes each

p832

Abstract: P832-1
Contextual Info: LH5P832 FEATURES • 32,768 x 8 bit organization • Access time: 100/120 ns MAX. • Cycle time: 160/190 ns (MIN.) • Power consumption: Operating: 357.5/303 mW Standby: 16.5 mW • TTL compatible I/O • 256 refresh cycle/4 ms • Auto refresh is executed by internal

ATT3000

Contextual Info: li M i a AT&T Data Sheet i May 1992 — ^ Microelectronics ATT3000 Series Field-Programmable Gate Arrays FEATURES • High Performance—up to 150 MHz Toggle Rates • User-Programmable Gate Array • I/O functions • Digital logic functions • Interconnections

Contextual Info: HM621664H/HM621864H Series 65536-word x 16/18-bit High Speed CMOS Static RAM HITACHI Description The HM621664H/HM621864H is an asynchronous high speed static RAM organized as 64-kword x 16/18bit. It realize high speed access time 20/25 ns with employing 0.8 |im CMOS process and high speed circuit

Contextual Info: LH5268A CMOS 64K 8K x 8 Static RAM FEATURES DESCRIPTION • 8,192 x 8 bit organization The LH5268Ais a static RAM organized as 8,192 x 8 bits. It is fabricated using silicon-gate CMOS process technology. • Access time: 100 ns (MAX.) • Power consumption:

M4Z28-BROOSH1

Contextual Info: M48Z35 M48Z35Y r z z SGS-THOMSON ^ 7 /« I^D [^ IllL[l©cm^®[RQQ©S 256Kb 32K x 8 ZEROPOWER® SRAM • INTEGRATED ULTRA LOW POWER SRAM, POWER-FAIL CONTROL CIRCUIT and BATTERY ■ READ CYCLE TIME EQUALS WRITE CYCLE TIME • AUTOMATIC POWER-FAIL CHIP DESELECT and

iz9a

Contextual Info: LH530800A-Y FEATURES CMOS 1M 128K x 8 3 V-Drive MROM PIN CONNECTIONS • 131,072 words x 8 bit organization • Access times: 500 ns (MAX.) at 2.6 V < Vcc < 4.5 V 150 ns (MAX.) at 4.5 V < Vcc < 5.5 V • Low-power consumption: Operating: 193 mW (MAX.) Standby: 550 (iW (MAX.)

Contextual Info: CMOS SyncFlFO 64x36 IDT723611 Integrated Device Technology, Inc. FEATURES: • Free-running CLKA and CLKB may be asynchronous or coincident permits simultaneous reading and writing of data on a single clock edge • 64 x 36 storage capacity • Synchronous data buffering from Port A to Port B

Contextual Info: CMOS 3 2 M 2M x 16/1M x 32 MROM FEATURES • 2,097,152 x 16 bit organization (Word mode: W = V,L) 1,048,576 x 32 bit organization (Double Word mode: W = Vm) PIN CONNECTIONS 70-PIN SSOP TOP VIEW r Z 1 A ,Z 2 Aq • A2 z 3 • Access time: 120 ns (MAX.) Access time in page mode: 50 ns (MAX.)

Contextual Info: CMOS 8M 1M x 8 MROM FEATURES • 1,048,576 words x 8 bit organization • Access time: 150 ns (MAX.) PIN CONNECTIONS 32-PIN DIP 32-PIN SOP TOP VIEW s • Low-power consumption: Operating: 275 mW (MAX.) Standby: 550 (iW (MAX.) • Static operation • TTL compatible I/O

Contextual Info: HM621664H/HM621864H Series — — Preliminary 65536-word x 16/18-bit High Speed CM O S Static RAM T he H M 621664H /H M 621864H is an asyncronous high speed static R A M organized as 64 kw ord x 1 6 /1 8 b it. It r e a liz e h ig h s p e e d a c c e s s tim e

KDS 4B 12 MHZ crystal

Abstract: plcc ic xc3042a 84pin Xc3030a
Contextual Info: E X I LI N X XC3000 Series Field Programmable Gate Arrays June 1, 1996 Version 2.0 Product Description Features • • • • • • • • Complete line of four related Field Programmable Gate Array product families - XC3000A, XC3000L, XC3100A, XC3100L