A2BL Search Results

Contextual Info: in tj 2-MBIT 128K x 16, 256K x 8 BOOT BLOCK FLASH MEMORY FAMILY 28F200BX-T/B, 28F002BX-T/B • x8/x16 Input/Output Architecture — 28F200BX-T, 28F200BX-B — For High Performance and High Integration 16-bit and 32-bit CPUs ■ x8-only Input/Output Architecture

Contextual Info: RGB514 150/170/220 MHz High Performance Palette DAC Product Description The RGB514 High-Performance Palette DAC solves the tra­ ditional compromise between display resolution and displayed colors. Implemented in IBM Microelectronics’ 0.8 micron CMOS technology, the RGB514 eliminates the bandwidth and

B60V

Contextual Info: RGB526/RGB526DB 5.0 5.1 VRAM Pixel Formats 5.3 Bit Ordering With 4 BPP format 8 pixels 32 bit VRAM width or 16 pixels (64 bit VRAM width) are obtained for each pixel port data access. As noted above the default access of the two pixels within each byte are high-to-low:

RGB525

Abstract: E4RE
Contextual Info: RGB525 3.0 M o d e s o f O pe ratio n Pixel da ta can come from the VGA port or the VRAM pixel port, as selected by the P O R T SEL bit of the M is ­ cellaneous Contr ol 2 register. If the VRAM pixel p ort is selected, the pixel f o r m a t can be 4 B P P bits p e r pixel , 8 BPP, 15/16 BPP, 24 B P P

diodo sl r7

Abstract: TMs 1122 NL BC 1305 pin outs DIODO 6N c11 cpl 100 39p HBT 01 - 04G Intel486TM PROCESSOR FAMILY 6M91 INTEL I486 DX2 diodo s4 6n
Contextual Info: intei MILITARY ln t e l 486 TM PROCESSOR FAMILY • lntelDX4TM Processor — Up to 100-MHz Operation -S peed-M ultiplying Technology — 32-Bit Architecture — 16K-Byte On-Chip Cache — Integrated Floating-Point Unit — 3.3V Core Operation with 5V Tolerant

Contextual Info: RGB528A 1.0 Microprocessor Access As seen on the microprocessor bus there are eight I/O addresses, selected by RS[2:0], Two indirect schemes are used to access all of the internal registers and arrays through these eight primary I/O addresses. The first scheme is standard VGA, and operates when

RGB524

Abstract: RGB526/RGB526DB
Contextual Info: RGB526/RGB526DB 1.0 Microprocessor Access As seen on th e m icroprocessor bus th e re are eight I/O addresses, selected by RS[2:0]. Two indirect schemes are used to access all of th e in te rn a l registers and arrays through th ese eight prim ary I/O addresses.

gmZ4S

Abstract: 5400 samsung lcd monitor circuit diagram C0012-DSR-01C gmZ4U hyundai L19 MC141584 genesis lcd controller dram FSDATA45 lg crt monitor circuit diagram GM72V161621ET
Contextual Info: DATA SHEET gmZ4 C0012-DAT-01C July 2000 Genesis Microchip Inc. 165 Commerce Valley Dr. West, Thornhill, ON Canada L3T 7V8 Tel: 905 889-5400 Fax: (905) 889-0035 2150 Gold Street, Alviso, CA USA 95002 Tel: (408) 262-6599 Fax: (408) 262-6365 www.genesis-microchip.com / info@genesis-microchip.on.ca

Contextual Info: in te l SPECIAL ENVIRONMENT 80960CA-25, -16 32-BIT HIGH-PERFORMANCE EMBEDDED PROCESSOR • Two Instructions/Clock Sustained Execution • Four 59 Mbytes/s DMA Channels with Data Chaining • Demultiplexed 32-bit Burst Bus with Pipelining i • 32-bit Parallel Architecture

Bck 2801

Abstract: intel i486dx i486 sx i82596CA gus manual 10BASE2 10BASE5 80960CA 82596CA I487
Contextual Info: 82596CA HIGH-PERFORMANCE 32-BIT LOCAL AREA NETWORK COPROCESSOR • Perform s Com plete C SM A /C D Medium Access Control MAC Functions— Independently o f CPU — IEEE 802.3 (EOC) Frame Delimiting ■ Supports Industry Standard LANs — IEEE TYPE 10BASE-T,

RGB524

Abstract: ibm comp M5F11 IBM vga registers
Contextual Info: IBM RGB524 170/220 MHz High Performance Palette DAC Product Description Product Highlights The RGB524TM High Performance Palette DAC from IBM brings the high quality and advanced capabilities of the previous generation RGB525 to a more compact package footprint,

STMicroelectronics marking code date

Abstract: Date Code Marking STMicroelectronics ST MICROELECTRONICS DATE CODE MARKING sumitomo crm epoxy Part Marking STMicroelectronics Ablebond 8360 marking code stmicroelectronics ablestik 8360 device Marking STMicroelectronics 1076E
Contextual Info: PRODUCT/PROCESS CHANGE NOTIFICATION PCN MPG-EEP/04/451 FWH AND LPC FAMILY PLCC32 PACKAGE ENVIRONMENTAL FRIENDLY AND ASSEMBLY LOCATION CHANGE 2004/02/12 PCN MPG-EEP/04/451 Product Family /Commercial Product M50FW M50LPW M50FLW Type Of Change Multiple types of changes

Globe Motors

Abstract: STR750-MCKIT shinano sd 7401 rc IEC60730 str 3234 800w inverter diagrams 800w inverter, ARM7TDMI shinano encoder fan 7073
Contextual Info: Motor control for STR750F 32-bit ARM-based MCU family For 3-phase brushless motor vector drives January 2007 www.st.com/mcu Vector control at optimum cost The STR750F is a new series of super-integrated, single-chip 32-bit ARM7-based MCUs from STMicroelectronics.

Contextual Info: PIE5@ y T [p[^E¥00 in te l Military lntel386TM EX EMBEDDED MICROPROCESSOR • Static Intel386 CPU Core — Low Power Consumption — 5V ± 5% Operating Power Supply — 25 MHz Operating Frequency Large Uniform Address Space — 64 Megabyte Physical — 64 Terabyte Virtual

GP028

Abstract: MB512 piix4 GP021
Contextual Info: 82371 AB PCI-TO-ISA / IDE XCELERATOR PIIX4 — Integrated 16 x 32-bit Buffer for IDE PCI Burst Transfers — Supports Glue-less “Swap-Bay” Option with Full Electrical Isolation • Supported Kits for both Pentium'and Pentium’ ll Microprocessors — 82430TX ISA Kit

8097-90 watchdog timer

Abstract: intel 8097 Intel A8097 A8097-90 MCS-96 809X-90 8097-90 MCS-96 cpu AD0-AD15 PGA68
Contextual Info: INTEL " CORP • UP/PRPHLS D | Mä5t.L75 r 0Gbä?4a M| ' P IS fllÄ Ä W in t e T MCS -96 809X-90,839X-90 T -4 9 -1 9 -1 6 T -4 9 -1 9 -5 9 Express ■ Extended Temperature Range ■ Burn-In ( —40°C to +85°C K The Intel EXPRESS system offers enhancements to the operationallspecifications of the MCS®-96 family of

gmZ4S

Abstract: Genesis microchip dat gmZ4U MC141584 DSR-0012 HITACHI microcontroller 0xc0 genesis video controller gm72v161621et Genesis Microchip osd DAT-0012-B
Contextual Info: PRELIMINARY DATA SHEET gmZ4 DAT-0012-B December 1999 Genesis Microchip Inc. 165 Commerce Valley Dr. West, Thornhill, ON Canada L3T 7V8 Tel: 905 889-5400 Fax: (905) 889-0035 1871 Landings Drive, Mountain View, CA, USA 94043 Tel: (650) 428-4277 Fax (650) 428-4288

INTEL 82360

Abstract: intel 82380 82380 lm 3361 82380 dma 82380-16 intel 80386 bus architecture pipeline architecture for 80386 82384 82380-20
Contextual Info: INTEL CORP -CUP/PRPHLS} h?£ 1 • 482^175 0151355=) in te l 82380 HIGH PERFORMANCE 32-BIT DMA CONTROLLER WITH INTEGRATED SYSTEM SUPPORT PERIPHERALS ■ High Performance 32-Bit DMA Controller — SO MBytes/sec Maximum Data Transfer Rate at 25 MHz — 8 Independently Programmable

37rgb

Abstract: rgb525 RGB524 pix15
Contextual Info: RGB524 1.0 Microprocessor Access As seen on the microprocessor bus there are eight I/O addresses, selected by RS[2:0], Two indirect schemes are used to access all of the internal registers and arrays through these eight primary I/O addresses. The first scheme is standard VGA, and operates when

ib17

Contextual Info: M D M M ! 0 M [F © [s ]ß M ? 0 © M SPECIAL ENVIRONMENT 80960CF-30, -25, -16 32-BIT HIGH-PERFORMANCE SUPERSCALAR PROCESSOR • Socket and Object Code Compatible with 80960CA • Two Instructions/Clock Sustained Execution • Four 59 Mbytes/s DMA Channels with Data Chaining

M87C51FB16

Abstract: M87C51
Contextual Info: in te i M87C51FB CHMOS SINGLE-CHIP 8-BIT MICROCONTROLLER WITH 16 KBYTES USER PROGRAMMABLE EPROM Military M87C51FB — 3.5 MHz to 12 MHz, VCC = 5V ± 20% M87C51FB-16 — 3.5 MHz to 16 MHz, Vcc = 5V ± 20% High Performance CHMOS EPROM Three 16-Bit Timer/Counters

kds 4h

Abstract: BA RV
Contextual Info: ;9.29 ><?<4DEB8 ;<:; A@G8B B8=4H 9NJYZWNX _ +HP A>B@AMs jngp FF _ jov LPBM<ABG@ <:I:;BEBMR _ nD5 =B>E><MKB< LMK>G@MA a;>MP>>G <HBE :G= <HGM:<MLb _ xK>>I:@> =BLM:G<>s jiFF _ ,>>MBG@ 5yz ipiie iolj K>BG?HK<> BGLNE:MBHG _ /KH=N<M BG :<<HK=:G<> MH ~zx oillnfj :O:BE:;E>

Contextual Info: RGB514 1.0 M icroprocessor Access As s e e n on t he mi c r o p r o c e s s o r bus t h e r e a r e e i g h t I/O a d d r e s s e s , sel ected by RS[2:0]. Two i n d i r e c t s c h e m e s are used to access all of t h e i n t e r n a l r eg i s t e r s a n d a r r a y s