AA07 Search Results

Contextual Info: AC centrifugal fan D4E146-AA07-22 forward curved, dual inlet with housing flange ebm-papst Mulfingen GmbH & Co. KG Bachmühle 2 • D-74673 Mulfingen Phone +49 7938 81-0 Fax +49 7938 81-110 info1@de.ebmpapst.com www.ebmpapst.com Limited partnership · Headquarters Mulfingen

2SB678

Abstract: 0939M TOSHIBA 2SB679
Contextual Info: 9097250 TOSHIBA mT| TCmESO ~5h TOSHIBA {DISCRETE/OPTO} aa077bb DISCRETE/OPTO SILICON NPN EPITAXIA L TYPE (PCT PROCESS) _ (DARLINGTON POWER)_ Unit in mm 09.39M A X. LOW FREQUENCY MEDIUM POIJER AMPLIFIER AND MEDIUM SPEED SWITCHING APPLICATIONS.

Contextual Info: AA07S Series 7W Single Output AC/DC converter FEATURES Š Ultra-compact AC-DC power supp ly for PCB Mounting Š Over Load and Over Voltage Protection Š EMI meets EN55022, Class B and EMS compliance to EN61000-4 Š Universal Input voltage range 85-264 VAC,

8B10B

Abstract: C035 CL45 P802 TLK3138
Contextual Info: TLK3138 www.ti.com SLLS762C – FEBRUARY 2007 – REVISED DECEMBER 2009 Dual XAUI Transceiver Check for Samples: TLK3138 • • • • • • • • 1 XGMII Extender Sublayer APPLICATIONS • 10 Gigabit Ethernet Servers and Routers TLK3138 TCLK(0) TD(31.0)

Supercool

Abstract: Supercool BOX-27 27681 Supercool sweden S-40120 heat sensor fan project S-401-20 lindberg
Contextual Info: 1 2 3 4 5 6 Specification: Ta=32°C A A 070 24 TEM Voltage: [VDC] TEM Current: [A] B Fan(s), cold side: Fan(s), warm side: Temperature controller, sensor: Temperature control settings, trim options: Additional controller information: 2 2 Temperature control position:

UltraSPARC-IIIi

Abstract: NVRAM for Sun UltraSparc IIi UltraSPARC-III STP2003QFP 4900 H02 gigabyte MOTHERBOARD CIRCUIT diagram A27 639 SME2411 SME1430LGA-360 SME1430LGA-440
Contextual Info: SME1430LGA-360 SME1430LGA-440 SME1430LGA-480 May 1999 UltraSPARC -IIi CPU DATA SHEET Highly Integrated 64-Bit RISC; L2-Cache, DRAM, PCI Interfaces DESCRIPTION The SME1430LGA CPU UltraSPARC-IIi microprocessor is a highly-integrated, 64-bit, SPARC V9 superscalar

e1218

Contextual Info: S ilico n ix SÌ9400DY A M em b er o f th e T E M ic G ro u p P-Channel Enhancement-Mode MOSFET Product Summary Vds r D S on -2 0 Id (Q) (A) 0.25 @ V GS = - 1 0 V t2.5 0.40 @ V GS = - 4 .5 V t2.0 (V) u SO-8 ¡X s [T s [X G |~T~ c. ~~8~~1 D ~7~1 D ~6~1 D

SI9950DY

Abstract: Si9950
Contextual Info: IF Siliconix SÌ9950DY A M e m b e r o f th e T e m ic G ro u p Complimentary MOSFET Half-Bridge Product Summary VDS V N- or P-Channel r DS(on) (Q) Id (A) 0.3 @ V GS = 10 V ± 2.0 1.0 @ V GS = 5 V ± 1.2 50 u v+ v+ SO-16 GND OUTPUT OUTPUT P-GATE OUTPUT OUTPUT

82C452

Abstract: P82C452 82C452A crt controller 6845 MCA Bus 8bit vga controller plasma 640x480 64kx4 DRAM LM339 XR31
Contextual Info: 82C452 Super VGA Graphics Controller Data Sheet September 1991 P R E L I M I N A R Y Copyright Notice Copyright 1990, Chips and Technologies, Inc. ALL RIGHTS RESERVED. This manual is copyrighted by Chips and Technologies, Inc. You may not reproduce,

transistor mp40

Abstract: mp10
Contextual Info: Data Sheet SigmaDSP 28-/56-Bit Audio Processor with Two ADCs and Four DACs ADAU1401 FEATURES GENERAL DESCRIPTION 28-/56-bit, 50 MIPS digital audio processor 2 ADCs: SNR of 100 dB, THD + N of −83 dB 4 DACs: SNR of 104 dB, THD + N of −90 dB Complete standalone operation

PPC405D4

Abstract: IBM powerpc 405gp NP4GS3 PVA c17 13n07 LP1 K09 marking a00b TDA 2040 XC5 539 405GP
Contextual Info:  IBM PowerNP NP2G Network Processor Preliminary February 12, 2003  0.1 Copyright and Disclaimer  Copyright International Business Machines Corporation 2003 All Rights Reserved US Government Users Restricted Rights - Use, duplication or disclosure restricted by GSA ADP Schedule Contract with IBM Corp.

5.1 home theatre assembling

Abstract: marking HBAR intel 945 crb MF823 RS-422 to spi converter DSP56300 DSP56302 HC11 national marking code TTL 74215
Contextual Info: DSP56302 OVERVIEW 1 SIGNAL/CONNECTION DESCRIPTIONS 2 MEMORY CONFIGURATION 3 CORE CONFIGURATION 4 GENERAL PURPOSE I/O 5 HOST INTERFACE HI08 6 ENHANCED SYNCHRONOUS SERIAL INTERFACE 7 SERIAL COMMUNICATION INTERFACE (SCI) 8 TIMER MODULE 9 ON-CHIP EMULATION MODULE

mvb bus schematics

Abstract: mc88000 DSP56001 users manual IC 7492 real time application and product for fir 32 bit carry select adder code 74 hc 589 DSP96002 fft D1 PGA 478 DSP96002
Contextual Info: DSP96002 32-BIT DIGITAL SIGNAL PROCESSOR USER’S MANUAL Motorola, Inc. Semiconductor Products Sector DSP Division 6501 William Cannon Drive, West Austin, Texas 78735-8598 SECTION 1 DSP96002 INTRODUCTION This manual describes the first member of a family of dual-port IEEE floating point programmable CMOS

0m02

Abstract: 4G TECHNOLOGY ndi2 F880 IBM3221L0572
Contextual Info: â IBM Packet Routing Switch PRS28.4G Version 1.7 Datasheet â Copyright and Disclaimer  Copyright International Business Machines Corporation 1999, 2000, 2001. All Rights Reserved Printed in the United States of America February 2001 The following are trademarks of International Business Machines Corporation in the United States, or other countries, or both.

P09N03

Contextual Info: PRELIMINARY PMC-Sierra, Inc. PM9311/2/3/5 ETT1 CHIP SET Data Sheet PMC-2000164 ISSUE 1 ENHANCED TT1™ SWITCH FABRIC PM9311/2/3/5 Enhanced TT1 Chip Set Enhanced TT1 Switch Fabric Datasheet Preliminary: April 2000 PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE

b20 p03

Abstract: GS214 TSD2331 tms 1601 EL B17 B20 n03 G5214
Contextual Info: VITESSE VSC7203 Preliminary Data Sheet 1 GByte/sec SCI Compliant Switch Node Bypass Circuit Features • One Port Conforms to Low Voltage Differential Signalling LVDS Standard (IEEE Std. 1596.3) Multiplexers Allow Bypassing Around any Port for Faulty Node Isolation.

bet GP 119 diode

Abstract: ir p 813h bet 82a BA-06 d31ad
Contextual Info: PCI1251AGFN/GJG PC CARD CONTROLLER S C P S 038-A U G U S T 1998 * • • • PCI Power Management 1.0 Compliant ACP11.0 Compliant Packaged in GFN 256-Pin BGA or GJG MicroStar BGA PCI Local Bus Specification Revision 2.2 Compliant 1997 PC Card Standard Compliant

MC68338

Contextual Info: SECTION 4 CORE CONFIGURATION MOTOROLA DSP56602 User’s Manual 4-1 Core Configuration 4.1 4.2 4.3 4.4 4.5 4.6 4-2 INTRODUCTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4-3 DSP56600 CORE-SPECIFIC ATTRIBUTES. . . . . . . . . . . . . . . .4-3

DD 127 D TRANSISTOR

Abstract: diagrams hitachi ecu hitachi ecu datasheet PQ208 PT280 QL82SD QL82SD-PQ208 QL82SD-PS484 QL82SD-PT280 diagrams hitachi c13 ecu
Contextual Info: QL82SD Device Data Sheet •••••• Device Highlights Extended Features LVDS SERDES Basic Features The following can be implemented into the programmable logic: • 10 High Speed Bus LVDS Serial Links— • • • • • • • • • • •

JVC RX E11

Abstract: wm8505
Contextual Info: Data Sheet WM8505 Application Processor September 23, 2009 Revision 0.71 Data Sheet WM8505 Application Processor i Revision History Rev Date Initial Note 0.7 Sep. 18, 09 TL Initial internal release 0.71 Sep. 23, 09 TL Added descriptions of NC balls to Ballout and Ball Lists

ADAU1702

Abstract: mp07 FZT953 6 position rotary switch sda 2084
Contextual Info: SigmaDSP 28-/56-Bit Audio Processor with Two ADCs and Four DACs ADAU1702 FEATURES GENERAL DESCRIPTION 28-/56-bit, 25 MIPS digital audio processor Two ADCs: SNR of 100 dB, THD + N of −83 dB Four DACs: SNR of 104 dB, THD + N of −90 dB Complete standalone operation

PPC405EP bsdl

Abstract: PPC405EP transistor w04 ppc405ep-3lb266c L16 eeprom smt w04 w04 75 405EP ns16750 PPC405EP-3GB133CZ
Contextual Info: Part Number PPC405EP Revision 1.07 – September 10, 2007 PPC405EP Data Sheet PowerPC 405EP Embedded Processor Features • • • • • • AMCC PowerPC 405 32-bit RISC processor core operating up to 333MHz with 16KB Dand I-caches PC-133 synchronous DRAM SDRAM interface

transistor mp40

Abstract: MP40 SERIES 0X081B mp52 TRANSISTOR 026
Contextual Info: SigmaDSP 28-/56-Bit Audio Processor with Two ADCs and Four DACs ADAU1401 FEATURES GENERAL DESCRIPTION 28-/56-bit, 50 MIPS digital audio processor 2 ADCs: SNR of 100 dB, THD + N of −83 dB 4 DACs: SNR of 104 dB, THD + N of −90 dB Complete standalone operation

LP1 K09

Abstract: emmc Pin assignment emmc jedec emmc pcb layout A09 N03 TRANSISTOR POWER LP1 K06 saa 1900 eMMC intel emmc reboot power current ADSP-BF60X
Contextual Info: Blackfin Dual Core Embedded Processor Preliminary Technical Data ADSP-BF606/ADSP-BF607/ADSP-BF608/ADSP-BF609 FEATURES MEMORY Dual-core symmetric high-performance Blackfin processor, up to 500 MHz per core Each core contains two 16-bit MACs, two 40-bit ALUs, and a